LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 101
LM3S102
Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S102.pdf
(330 pages)
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8.1
Figure 8-1. GPIO Module Block Diagram
8.2
July 6, 2006
Block Diagram
Functional Description
Important:
Each GPIO port is a separate hardware instantiation of the same physical block (see Figure 8-2).
The LM3S102 microcontroller contains three ports and thus three of these physical GPIO blocks.
All GPIO pins are inputs by default (GPIODIR=0 and GPIOAFSEL=0), with the
exception of the five JTAG pins (PB7 and PC[3:0]. The JTAG pins default to their
JTAG functionality (GPIOAFSEL=1). Asserting a Power-On-Reset (POR) or an
external reset (RST) puts both groups of pins back to their default state.
PA0
PA1
PA2
PA3
PA4
PA5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC0
PC1
PC2
PC3
Preliminary
CCP1
CCP0
U0Rx
U0Tx
SSIClk
SSIFss
32KHz
C0-
C0o
C0+
SSIRx
SSITx
TCK/SWCLK
TMS/SWDIO
TDI
TDO/SWO
I2CSCL
I2CSDA
UART0
SSI
Comparator
I
2
C
Timer 0
Timer 1
JTAG
Analog
TRST
LM3S102 Data Sheet
101
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