LM3S1960 Luminary Micro, Inc, LM3S1960 Datasheet - Page 5

no-image

LM3S1960

Manufacturer Part Number
LM3S1960
Description
Lm3s1960 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S1960-EQC50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1960-EQC50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1960-IBZ50-A2
Manufacturer:
Texas Instruments
Quantity:
135
Part Number:
LM3S1960-IBZ50-A2
Manufacturer:
TI
Quantity:
183
Part Number:
LM3S1960-IBZ50-A2
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1960-IBZ50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LM3S1960-IQC50-A2
Manufacturer:
TI
Quantity:
126
Part Number:
LM3S1960-IQC50-A2T
Manufacturer:
Texas Instruments
Quantity:
10 000
10
10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 208
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 208
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 209
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 213
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 214
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 214
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 215
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 215
10.3.6 16-Bit PWM Mode ................................................................................................................... 216
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 266
12.2.2 Baud-Rate Generation ............................................................................................................. 267
12.2.3 Data Transmission .................................................................................................................. 267
12.2.4 Serial IR (SIR) ......................................................................................................................... 268
12.2.5 FIFO Operation ....................................................................................................................... 269
12.2.6 Interrupts ................................................................................................................................ 269
12.2.7 Loopback Operation ................................................................................................................ 270
12.2.8 IrDA SIR block ........................................................................................................................ 270
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 307
13.2.2 FIFO Operation ....................................................................................................................... 307
13.2.3 Interrupts ................................................................................................................................ 307
13.2.4 Frame Formats ....................................................................................................................... 308
13.3
13.4
13.5
14
14.1
July 25, 2008
General-Purpose Timers ................................................................................................. 206
Block Diagram ........................................................................................................................ 206
Functional Description ............................................................................................................. 207
Initialization and Configuration ................................................................................................. 213
Register Map .......................................................................................................................... 216
Register Descriptions .............................................................................................................. 217
Watchdog Timer ............................................................................................................... 242
Block Diagram ........................................................................................................................ 242
Functional Description ............................................................................................................. 242
Initialization and Configuration ................................................................................................. 243
Register Map .......................................................................................................................... 243
Register Descriptions .............................................................................................................. 244
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 265
Block Diagram ........................................................................................................................ 266
Functional Description ............................................................................................................. 266
Initialization and Configuration ................................................................................................. 270
Register Map .......................................................................................................................... 271
Register Descriptions .............................................................................................................. 272
Synchronous Serial Interface (SSI) ................................................................................ 306
Block Diagram ........................................................................................................................ 306
Functional Description ............................................................................................................. 306
Initialization and Configuration ................................................................................................. 315
Register Map .......................................................................................................................... 316
Register Descriptions .............................................................................................................. 317
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 343
2
C) Interface ............................................................................ 343
Preliminary
LM3S1960 Microcontroller
5

Related parts for LM3S1960