LM3S1960 Luminary Micro, Inc, LM3S1960 Datasheet - Page 14

• Manufacturer Part Number: LM3S1960
• Description: Lm3s1960 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
Register 32:
General-Purpose Timers ............................................................................................................. 206
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Watchdog Timer ........................................................................................................................... 242
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 265
Register 1:
Register 2:
Register 3:
Register 4:
Register 5:
Register 6:
14
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 205
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 218
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 219
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 221
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 223
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 226
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 228
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 229
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 230
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 232
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 233
GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ................................................... 234
GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 .................................................. 235
GPTM TimerA Prescale (GPTMTAPR), offset 0x038 ........................................................ 236
GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ....................................................... 237
GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040 ........................................... 238
GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044 ........................................... 239
GPTM TimerA (GPTMTAR), offset 0x048 ........................................................................ 240
GPTM TimerB (GPTMTBR), offset 0x04C ....................................................................... 241
Watchdog Load (WDTLOAD), offset 0x000 ...................................................................... 245
Watchdog Value (WDTVALUE), offset 0x004 ................................................................... 246
Watchdog Control (WDTCTL), offset 0x008 ..................................................................... 247
Watchdog Interrupt Clear (WDTICR), offset 0x00C .......................................................... 248
Watchdog Raw Interrupt Status (WDTRIS), offset 0x010 .................................................. 249
Watchdog Masked Interrupt Status (WDTMIS), offset 0x014 ............................................. 250
Watchdog Test (WDTTEST), offset 0x418 ....................................................................... 251
Watchdog Lock (WDTLOCK), offset 0xC00 ..................................................................... 252
Watchdog Peripheral Identification 4 (WDTPeriphID4), offset 0xFD0 ................................. 253
Watchdog Peripheral Identification 5 (WDTPeriphID5), offset 0xFD4 ................................. 254
Watchdog Peripheral Identification 6 (WDTPeriphID6), offset 0xFD8 ................................. 255
Watchdog Peripheral Identification 7 (WDTPeriphID7), offset 0xFDC ................................ 256
Watchdog Peripheral Identification 0 (WDTPeriphID0), offset 0xFE0 ................................. 257
Watchdog Peripheral Identification 1 (WDTPeriphID1), offset 0xFE4 ................................. 258
Watchdog Peripheral Identification 2 (WDTPeriphID2), offset 0xFE8 ................................. 259
Watchdog Peripheral Identification 3 (WDTPeriphID3), offset 0xFEC ................................. 260
Watchdog PrimeCell Identification 0 (WDTPCellID0), offset 0xFF0 .................................... 261
Watchdog PrimeCell Identification 1 (WDTPCellID1), offset 0xFF4 .................................... 262
Watchdog PrimeCell Identification 2 (WDTPCellID2), offset 0xFF8 .................................... 263
Watchdog PrimeCell Identification 3 (WDTPCellID3 ), offset 0xFFC .................................. 264
UART Data (UARTDR), offset 0x000 ............................................................................... 273
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 275
UART Flag (UARTFR), offset 0x018 ................................................................................ 277
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 279
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 280
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 281
Preliminary
July 25, 2008