LM3S1960 Luminary Micro, Inc, LM3S1960 Datasheet - Page 4

• Manufacturer Part Number: LM3S1960
• Description: Lm3s1960 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
6.1.2
6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
4
Reset Control ............................................................................................................................ 59
Power Control ........................................................................................................................... 62
Clock Control ............................................................................................................................ 62
System Control ......................................................................................................................... 65
Initialization and Configuration ................................................................................................... 66
Register Map ............................................................................................................................ 67
Register Descriptions ................................................................................................................ 68
Hibernation Module .......................................................................................................... 121
Block Diagram ........................................................................................................................ 122
Functional Description ............................................................................................................. 122
Register Access Timing ........................................................................................................... 122
Clock Source .......................................................................................................................... 123
Battery Management ............................................................................................................... 124
Real-Time Clock ...................................................................................................................... 125
Non-Volatile Memory ............................................................................................................... 125
Power Control ......................................................................................................................... 125
Interrupts and Status ............................................................................................................... 126
Initialization and Configuration ................................................................................................. 126
Initialization ............................................................................................................................. 126
RTC Match Functionality (No Hibernation) ................................................................................ 127
RTC Match/Wake-Up from Hibernation ..................................................................................... 127
External Wake-Up from Hibernation .......................................................................................... 127
RTC/External Wake-Up from Hibernation .................................................................................. 127
Register Map .......................................................................................................................... 127
Register Descriptions .............................................................................................................. 128
Internal Memory ............................................................................................................... 141
Block Diagram ........................................................................................................................ 141
Functional Description ............................................................................................................. 141
SRAM Memory ........................................................................................................................ 141
Flash Memory ......................................................................................................................... 142
Flash Memory Initialization and Configuration ........................................................................... 143
Flash Programming ................................................................................................................. 143
Nonvolatile Register Programming ........................................................................................... 144
Register Map .......................................................................................................................... 144
Flash Register Descriptions (Flash Control Offset) ..................................................................... 145
Flash Register Descriptions (System Control Offset) .................................................................. 152
General-Purpose Input/Outputs (GPIOs) ....................................................................... 165
Functional Description ............................................................................................................. 165
Data Control ........................................................................................................................... 166
Interrupt Control ...................................................................................................................... 167
Mode Control .......................................................................................................................... 168
Commit Control ....................................................................................................................... 168
Pad Control ............................................................................................................................. 168
Identification ........................................................................................................................... 168
Initialization and Configuration ................................................................................................. 168
Register Map .......................................................................................................................... 170
Register Descriptions .............................................................................................................. 171
Preliminary
July 25, 2008