LM3S6422 Luminary Micro, Inc, LM3S6422 Datasheet - Page 26
LM3S6422
Manufacturer Part Number
LM3S6422
Description
Lm3s6422 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6422.pdf
(473 pages)
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Architectural Overview
26
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ADC
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Analog Comparators
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GPIOs
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Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
Programmable baud-rate generator allowing speeds up to 1.5625 Mbps
Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
Standard asynchronous communication bits for start, stop, and parity
False-start-bit detection
Line-break generation and detection
Single- and differential-input configurations
Two 10-bit channels (inputs) when used as single-ended inputs
Sample rate of 250 thousand samples/second
Flexible, configurable analog-to-digital conversion
Four programmable sample conversion sequences from one to eight entries long, with
corresponding conversion result FIFOs
Each sequence triggered by software or internal event (timers, analog comparators, or GPIO)
On-chip temperature sensor
Two independent integrated analog comparators
Configurable for output to: drive an output pin, generate an interrupt, or initiate an ADC sample
sequence
Compare external pin input to external pin input or to internal programmable voltage reference
12-34 GPIOs, depending on configuration
5-V-tolerant input/outputs
Programmable interrupt generation as either edge-triggered or level-sensitive
Low interrupt latency; as low as 6 cycles and never more than 12 cycles
Bit masking in both read and write operations through address lines
Can initiate an ADC sample sequence
Pins configured as digital inputs are Schmitt-triggered.
Preliminary
July 25, 2008
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