LM3S6422 Luminary Micro, Inc, LM3S6422 Datasheet - Page 13
LM3S6422
Manufacturer Part Number
LM3S6422
Description
Lm3s6422 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6422.pdf
(473 pages)
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General-Purpose Input/Outputs (GPIOs) ................................................................................... 141
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General-Purpose Timers ............................................................................................................. 183
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July 25, 2008
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C ................................... 137
Flash Memory Protection Program Enable 1 (FMPPE1), offset 0x404 ............................... 138
Flash Memory Protection Program Enable 2 (FMPPE2), offset 0x408 ............................... 139
Flash Memory Protection Program Enable 3 (FMPPE3), offset 0x40C ............................... 140
GPIO Data (GPIODATA), offset 0x000 ............................................................................ 149
GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 150
GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 151
GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 152
GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 153
GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 154
GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 155
GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 156
GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 157
GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 158
GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 160
GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 161
GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 162
GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 163
GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 164
GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 165
GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 166
GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 167
GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 168
GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 169
GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 171
GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 172
GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 173
GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 174
GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 175
GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 176
GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 177
GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 178
GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 179
GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 180
GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 181
GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 182
GPTM Configuration (GPTMCFG), offset 0x000 .............................................................. 195
GPTM TimerA Mode (GPTMTAMR), offset 0x004 ............................................................ 196
GPTM TimerB Mode (GPTMTBMR), offset 0x008 ............................................................ 198
GPTM Control (GPTMCTL), offset 0x00C ........................................................................ 200
GPTM Interrupt Mask (GPTMIMR), offset 0x018 .............................................................. 203
GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C ..................................................... 205
GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ................................................ 206
GPTM Interrupt Clear (GPTMICR), offset 0x024 .............................................................. 207
GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ................................................. 209
GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C ................................................ 210
Preliminary
LM3S6422 Microcontroller
13
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