LM3S1637 Luminary Micro, Inc, LM3S1637 Datasheet - Page 17

• Manufacturer Part Number: LM3S1637
• Description: Lm3s1637 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Synchronous Serial Interface (SSI) ............................................................................................ 341
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Inter-Integrated Circuit (I
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Analog Comparator ..................................................................................................................... 413
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July 25, 2008
SSI Control 0 (SSICR0), offset 0x000 .............................................................................. 353
SSI Control 1 (SSICR1), offset 0x004 .............................................................................. 355
SSI Data (SSIDR), offset 0x008 ...................................................................................... 357
SSI Status (SSISR), offset 0x00C ................................................................................... 358
SSI Clock Prescale (SSICPSR), offset 0x010 .................................................................. 360
SSI Interrupt Mask (SSIIM), offset 0x014 ......................................................................... 361
SSI Raw Interrupt Status (SSIRIS), offset 0x018 .............................................................. 363
SSI Masked Interrupt Status (SSIMIS), offset 0x01C ........................................................ 364
SSI Interrupt Clear (SSIICR), offset 0x020 ....................................................................... 365
SSI Peripheral Identification 4 (SSIPeriphID4), offset 0xFD0 ............................................. 366
SSI Peripheral Identification 5 (SSIPeriphID5), offset 0xFD4 ............................................. 367
SSI Peripheral Identification 6 (SSIPeriphID6), offset 0xFD8 ............................................. 368
SSI Peripheral Identification 7 (SSIPeriphID7), offset 0xFDC ............................................ 369
SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0 ............................................. 370
SSI Peripheral Identification 1 (SSIPeriphID1), offset 0xFE4 ............................................. 371
SSI Peripheral Identification 2 (SSIPeriphID2), offset 0xFE8 ............................................. 372
SSI Peripheral Identification 3 (SSIPeriphID3), offset 0xFEC ............................................ 373
SSI PrimeCell Identification 0 (SSIPCellID0), offset 0xFF0 ............................................... 374
SSI PrimeCell Identification 1 (SSIPCellID1), offset 0xFF4 ............................................... 375
SSI PrimeCell Identification 2 (SSIPCellID2), offset 0xFF8 ............................................... 376
SSI PrimeCell Identification 3 (SSIPCellID3), offset 0xFFC ............................................... 377
I
I
I
I
I
I
I
I
I
I
I
I
I
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I
Analog Comparator Masked Interrupt Status (ACMIS), offset 0x00 .................................... 417
Analog Comparator Raw Interrupt Status (ACRIS), offset 0x04 ......................................... 418
Analog Comparator Interrupt Enable (ACINTEN), offset 0x08 ........................................... 419
Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x10 ......................... 420
Analog Comparator Status 0 (ACSTAT0), offset 0x20 ....................................................... 421
Analog Comparator Control 0 (ACCTL0), offset 0x24 ....................................................... 422
2
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C Master Slave Address (I2CMSA), offset 0x000 ........................................................... 392
C Master Control/Status (I2CMCS), offset 0x004 ........................................................... 393
C Master Data (I2CMDR), offset 0x008 ......................................................................... 397
C Master Timer Period (I2CMTPR), offset 0x00C ........................................................... 398
C Master Interrupt Mask (I2CMIMR), offset 0x010 ......................................................... 399
C Master Raw Interrupt Status (I2CMRIS), offset 0x014 ................................................. 400
C Master Masked Interrupt Status (I2CMMIS), offset 0x018 ........................................... 401
C Master Interrupt Clear (I2CMICR), offset 0x01C ......................................................... 402
C Master Configuration (I2CMCR), offset 0x020 ............................................................ 403
C Slave Own Address (I2CSOAR), offset 0x000 ............................................................ 405
C Slave Control/Status (I2CSCSR), offset 0x004 ........................................................... 406
C Slave Data (I2CSDR), offset 0x008 ........................................................................... 408
C Slave Interrupt Mask (I2CSIMR), offset 0x00C ........................................................... 409
C Slave Raw Interrupt Status (I2CSRIS), offset 0x010 ................................................... 410
C Slave Masked Interrupt Status (I2CSMIS), offset 0x014 .............................................. 411
C Slave Interrupt Clear (I2CSICR), offset 0x018 ............................................................ 412
2
C) Interface ........................................................................................ 378
Preliminary
LM3S1637 Microcontroller
17