AD8191 Analog Devices, AD8191 Datasheet - Page 17

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AD8191

Manufacturer Part Number
AD8191
Description
4:1 DVI/HDMI Switch with Equalization Preliminary Data Sheet (Rev. PrJ, 8/2006)
Manufacturer
Analog Devices
Datasheet

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Preliminary Technical Data
external terminations are provided, set the output current level
to 10 mA. The high speed outputs must be disabled if there are
no output termination resistors present in the system.
The output pre-emphasis can be manually configured to
provide one of four different levels of high frequency boost. The
specific boost level is selected by programming the TX_PE bits
of the transmitter settings register. No specific cable length is
suggested for a particular pre-emphasis setting because cable
performance varies widely between manufacturers.
AD8191 HIGH SPEED SWITCHING MODES
The AD8191 has three high speed switching modes that can be
selected by programming the HS_SM bits of the high speed
modes register.
Single Switching Mode
In this mode the AD8191 behaves as a single 16:1 TMDS
channel multiplexer; a single channel, out of a possible 16, is
routed to all of the outputs. The input channel that is routed to
the outputs can be selected by programming the HS_CH bits in
the high speed modes register.
Dual Switching Mode
In this mode the AD8191 behaves as two locked 8:1 TMDS
channel switches. These two locked switches share the channel
select input and therefore switch together. The user can select
which of the two 8-input groups are routed to outputs by
programming the HD_CH bits of the high speed modes
register.
Q uad Switching Mode
U
This is the default mode. In Quad mode the AD8191 behaves
like a 4:1 DVI/HDMI link multiplexer, routing groups of 4
input channels to the 4-chanenel output. The user can select
which link is routed to the output by programming the HS_CH
bits of the High Speed Modes Register.
AUXILIARY SWITCH
The auxiliary (low speed) lines have no amplification. They are
routed using a passive switch that is bandwidth compatible with
standard speed I
connection is shown in Figure 12.
When turning off the AD8191, care needs to be taken with
the AMUXVCC supply to ensure that the auxiliary multiplexer
pins are in a high impedance state. A scenario that illustrates
this requirement is one where the auxiliary multiplexer is used
to switch the display data channel (DDC) bus. In some applica-
Figure 12. Auxiliary Channel Simplified Schematic. AUX_A0 to AUX_COM0
2
P
C. The schematic equivalent for this passive
P
Routing Example Showed.
Rev. PrJ | Page 17 of 29
tions, additional devices can be connected to the DDC bus
(such as an EEPROM with EDID information) upstream of the
AD8191. Extended display identification data (EDID) is a VESA
standard-defined data format for conveying display configuration
information to sources to optimize display use. EDID devices
may need to be available via the DDC bus, regardless of the
state of the AD8191 and any downstream circuit. For this
configuration, the auxiliary inputs of the powered down
AD8191 need to be in a high impedance state to avoid pulling
down on the DDC lines and preventing these other devices
from using the bus.
When the AD8191 is powered from a simple resistor network,
as shown in Figure 13,it uses the 5 V supply that is required
from any HDMI/DVI source to guarantee high impedance of
the auxiliary multiplexer pins. The AMUXVCC supply does not
draw any static current; therefore, it is recommended that the
resistor network tap the 5 V supplies as close to the connectors
as possible to avoid any additional voltage drop.
This precaution does not need to be taken if the DDC
peripheral circuitry is connected to the bus downstream of
the AD8191.
Figure 13: Suggested AMUXVCC Power Scheme.
AD8191

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