TN28F010-150 Intel Corporation, TN28F010-150 Datasheet
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TN28F010-150
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TN28F010-150 Summary of contents
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X 8) CMOS FLASH MEMORY 8 n Flash Electrical Chip-Erase 1 Second Typical Chip-Erase n Quick-Pulse Programming Algorithm 10 µs Typical Byte-Program 2 Second Chip-Program n 100,000 Erase/Program Cycles n 12.0 V ± High-Performance ...
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... Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 5937 Denver, CO 80217-9808 or call 1-800-548-4725 or visit Intel’s website at http://www.intel.com Copyright © Intel Corporation 1996, 1997. * Third-party brands and names are the property of their respective owners. ...
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APPLICATIONS ..............................................5 2.0 PRINCIPLES OF OPERATION .......................8 2.1 Integrated Stop Timer ..................................8 2.2 Write Protection ...........................................9 2.2.1 Bus Operations......................................9 2.2.1.1 Read...............................................9 2.2.1.2 Output Disable ................................9 2.2.1.3 Standby ........................................10 2.2.1.4 Intelligent Identifier Operation .......10 2.2.1.5 Write .............................................10 2.2.2 Command Definitions ...
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REVISION HISTORY Number -007 Removed 200 ns Speed Bin Revised Erase Maximum Pulse Count for Figure 4 from 3000 to 1000 Clarified AC and DC Test Conditions Added “dimple” TSOP Package Corrected Serpentine Layout -008 Corrected AC ...
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APPLICATIONS The 28F010 flash memory provides nonvolatility along with the capability to perform over 100,000 electrical chip-erasure/reprogram cycles. These features make the 28F010 an innovative alternative to disk, EEPROM, and battery-backed static RAM. Where periodic updates of code and ...
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Figure 1. 28F010 Block Diagram Symbol Type A –A INPUT ADDRESS INPUTS for memory addresses. Addresses are internally 0 16 latched during a write cycle. DQ –DQ INPUT/OUTPUT DATA INPUT/OUTPUT: Inputs data during memory write cycles; outputs 0 7 ...
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Table 1. Pin Description (Continued) Symbol Type V ERASE/PROGRAM POWER SUPPLY for writing the command register, PP erasing the entire array, or programming bytes in the array. V DEVICE POWER SUPPLY (5 V ±10 GROUND ...
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Figure 3. 28F010 in a 80C186 System 2.0 PRINCIPLES OF OPERATION Flash memory augments EPROM functionality with in-circuit electrical erasure and reprogramming. The 28F010 introduces a command register to manage this new functionality. The command register allows for: 100% ...
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Table 2. 28F010 Bus Operations Mode Read Output Disable READ-ONLY Standby Intelligent Identifier (Mfr) (2) Intelligent Identifier (Device) Read READ/WRITE Output Disable Standby (5) Write NOTES: 1. Refer to DC Characteristics . When PPL 2. Manufacturer ...
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Standby With CE logic-high level, the standby operation disables most of the 28F010’s circuitry and substantially reduces device consumption. The outputs are placed in a high- impedance state, independent of the OE# signal. If the 28F010 ...
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Table 3. Command Definitions Bus Cycles Command Req’d Operation Read Memory 1 Write Read Intelligent 3 Write Identifier Codes (4) Set-Up 2 Write Erase/Erase (5) Erase Verify (5) 2 Write Set-Up Program/ 2 Write Program (6) Program Verify (6) 2 ...
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Set-Up Erase/Erase Commands Set-Up Erase is a command-only operation that stages the device for electrical erasure of all bytes in the array. The set-up erase operation is performed ...
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Refer to AC Characteristics— Write/Erase/Program Only Operations waveforms for specific timing parameters. 2.2.2.7 Reset Command A Reset command is provided as a means to safely abort the Erase or Program command sequences. Following either Set-Up command (Erase or Program) ...
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Start (4) Programming (1) Apply V PPH PLSCNT = 0 Write Set-Up Program Cmd Write Program Cmd (A/D) Time Out 10 µs Write Program Verify Cmd Time Out 6 µs Read Data from Device N Verify Data Y N ...
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Start Erasure Y Data = 00H? N Program All Bytes to 00H (1) Apply V PPH ADDR = 00H PLSCNT = 0 Write Erase Set-Up Cmd Write Erase Cmd Time Out 10 ms Write Erase Verify Cmd Time Out ...
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DESIGN CONSIDERATIONS 3.1 Two-Line Output Control Flash memories are often used in larger memory arrays. Intel provides two read control inputs to accommodate multiple memory connections. Two- line control provides for: a. the lowest possible memory power dissipation ...
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Table 4. 28F010 Typical Update Power Dissipation Operation Array Program/Program Verify Array Erase/Erase Verify One Complete Cycle NOTES: 1. Formula to calculate typical Program/Program Verify Power = [ × I typical × # Bytes × typical ...
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ELECTRICAL SPECIFICATIONS 4.1 Absolute Maximum Ratings* Operating Temperature During Read ...............................0 °C to +70 °C During Erase/Program................0 °C to +70 °C Operating Temperature During Read ...........................–40 °C to +85 °C During Erase/Program............–40 °C to +85 °C Temperature Under ...
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DC Characteristics—TTL/NMOS Compatible—Commercial Products Symbol Parameter Notes I Input Leakage Current LI I Output Leakage Current Standby Current CCS Active Read Current CC1 Programming Current 1, 2 CC2 CC I ...
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DC Characteristics—TTL/NMOS Compatible—Commercial Products (Continued) Symbol Parameter Notes I A Intelligent Identifier Current V V during Read-Only PPL PP Operations V V during Read/Write PPH PP Operations V V Erase/Write Lock LKO CC Voltage ...
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DC Characteristics—CMOS Compatible—Commercial Products Symbol Parameter Notes I V Read Current, ID PP1 PP Current or Standby Current I V Programming Current 1, 2 PP2 Erase Current 1, 2 PP3 Program Verify 1, ...
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DC Characteristics—TTL/NMOS Compatible—Extended Temperature Products Symbol Parameter Notes I Input Leakage Current LI I Output Leakage Current Standby Current CCS Active Read Current CC1 Programming Current 1, 2 CC2 ...
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DC Characteristics—TTL/NMOS Compatible—Extended Temperature Products (Continued) Symbol Parameter Notes I A Intelligent Identifier Current V V during Read-Only PPL PP Operations V V during Read/Write PPH PP Operations V V Erase/Write Lock LKO CC Voltage ...
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DC Characteristics—CMOS Compatible—Extended Temperature Products (Continued) Symbol Parameter Notes I V Programming Current 1, 2 PP2 Erase Current 1, 2 PP3 Program Verify 1, 2 PP4 PP Current I V Erase Verify ...
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Input Test Points 0.8 0.45 AC test inputs are driven for a Logic “1” OH TTL and V (0. for a Logic “0”. Input timing begins at OL TTL V (2.0 ...
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Figure 8. AC Waveforms for Read Operations 26 290207-9 ...
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AC Characteristics—Write/Erase/Program Only Operations Commercial and Extended Temperature Products Versions Symbol Characteristic t /t Write Cycle Time AVAV Address Set-Up Time AVWL Address Hold Time WLAX Data Set-Up Time DVWH ...
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Figure 9. Typical Programming Capability Figure 10. Typical Program Time 290207-13 Figure 11. Typical Erase Capability 290207-14 Figure 12. Typical Erase Time 290207-15 290207-16 ...
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Figure 13. AC Waveforms for Programming Operations 28F010 290207-10 29 ...
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Figure 14. AC Waveforms for Erase Operations 30 290207-11 ...
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AC Characteristics—Alternative CE#-Controlled Writes Commercial and Extended Temperature Versions Symbol Characteristic t Write Cycle Time AVAV t Address Set-Up Time AVEL t Address Hold Time ELAX t Data Set-Up Time DVEH t Data Hold Time EHDX t Write Recovery ...
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Erase and Programming Performance Parameter Notes Chip Erase Time Chip Program Time NOTES: 1. “Typicals” are not guaranteed, but based on samples from production lots. Data taken at 25 °C, 12.0 V ...
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... E28F010-120 E28F010-150 TE28F010-90 TE28F010-120 TE28F010-150 6.0 ADDITIONAL INFORMATION Visit Intel’s World Wide Web home page at http://www.Intel.com for technical documentation and tools. Access Speed (ns) Density 010 = 1 Mbit N28F010-90 P28F010-90 N28F010-120 P28F010-120 N28F010-150 P28F010-150 TN28F010-90 TP28F010-90 TN28F010-120 TP28F010-120 TN28F010-150 TP28F010-150 28F010 290207-20 33 ...