MCP4728 Microchip Technology Inc., MCP4728 Datasheet - Page 42

• Manufacturer Part Number: MCP4728
• Description: 12-bit, Quad Digital-to-analog Converter With Eeprom Memory
• Manufacturer: Microchip Technology Inc.

MCP4728
FIGURE 5-11:
DS22187A-page 42
Start
Command Type Bits:
S 1 1 0 0 A2 A1 A0 0 A 0 1 1 A2 A1 A0 0 1 A 0 1 1 A2 A1 A0 1 0 A 0
Clock Pulse
(CLK Line)
Clock and LDAC Transition Details:
LDAC Pin
LDAC Pin
Device
Code
1st Byte
5
Address Bits
2nd Byte
Note 1: Clock Pulse and LDAC Transition Details.
Current
6
Note 2 (a)
2: LDAC pin events at the 2nd and 3rd bytes.
3: LDAC pin resumes its normal function after “Stop” bit.
4: EEPROM Write/
Write Command: Write I
R/W
a.
b.
c.
a.
b.
7
C2=0
(C2 C1 C0)
Keep LDAC pin “High” until the end of the positive pulse of the 8th clock of the
2nd
LDAC pin makes a transition from “High” to “Low” during the negative pulse of the
8th clock of the 2nd byte (just before the rising edge of the 9th clock), and stays
“Low” until the rising edge of the 9th clock of the 3rd byte.
(b) are not met.
Charge Pump initiates the EEPROM write sequence at the falling edge of the 4th
byte’s ACK pulse.
The RDY/BSY bit (pin) goes “Low” at the falling edge of this ACK clock and back
to “High” immediately after the EEPROM write is completed.
The MCP4728 device does not acknowledge the 3rd byte if the conditions (a) and
Command
8
Type
byte.
9
C1=1
Note 2(b)
Address Bits
Current
1
2nd Byte
C0=1
2
Stay “Low” during this 3rd byte
2
C Address Bits to the DAC Registers and EEPROM.
3
Note 2(b)
Command
Type
4
3rd Byte
(Notes 1, 2, 3)
ACK (MCP4728)
3rd Byte
5
Address Bits
Current
6
7
8
Command
Type
9
© 2009 Microchip Technology Inc.
1
Note 3
1 A2 A1 A0 1 1 A P
1
4th Byte
New Address Bits
(for confirmation)
Note 3
4th Byte
-----
Note 4
9
Note 4
Stop
P
Stop