MCP4728 Microchip Technology Inc., MCP4728 Datasheet - Page 34

• Manufacturer Part Number: MCP4728
• Description: 12-bit, Quad Digital-to-analog Converter With Eeprom Memory
• Manufacturer: Microchip Technology Inc.

MCP4728
5.5
The Master (MCU) can write or read the DAC input
registers or EEPROM using the I
command.
The following sections describe the communication
examples to write and read the DAC registers and
EEPROM using the I
TABLE 5-1:
DS22187A-page 34
Fast Mode Write
Write DAC Input Register and EEPROM
Write I
Write V
Note 1:
Command Field
C2
0
0
0
1
1
1
2
2:
3:
4:
REF
C Address Bits (A2, A1, A0)
C1
0
1
Writing and Reading Registers
and EEPROM
1
, Gain, and Power-Down Select Bits (Note 4)
0
1
0
The analog output is updated when LDAC pin is (or changes to) “Low”. UDAC bit is not used for this command.
The DAC output is updated when LDAC pin or UDAC bit is “Low”.
The device starts writing to the EEPROM on the acknowledge clock pulse of the last channel. The device does not exe-
cute any command until RDY/BSY bit comes back to “High”.
The input and output registers are updated at the acknowledge clock pulse of the last byte. The update does not require
LDAC pin or UDAC bit conditions. EEPROM is not affected.
C0
X
0
1
0
0
1
WRITE COMMAND TYPES
W1
2
Function
Not Used
Not Used
Not Used
Not Used
Not Used
0
1
1
C interface.
Write
W0
0
0
1
Sequential Write for
DAC Input Registers
and EEPROM
Write I
bits to Input Registers
bits to Input Registers
Single Write for DAC
(V
Write Gain selection
Multi-Write for DAC
Fast Write for DAC
Write Power-Down
Input Register and
Command Name
to Input Registers
Write Reference
REF
Input Registers
Input Registers
EEPROM
2
) selection bits
C Address Bits This command writes new I
2
C interface
This command writes to the DAC input registers sequentially with lim-
ited configuration bits. The data is sent sequentially from channels A to
D. The input register is written at the acknowledge clock pulse of the
channel’s last input data byte. EEPROM is not affected. (Note 1)
This command writes to multiple DAC input registers, one DAC input
register at a time. The writing channel register is defined by the DAC
selection bits (DAC1, DAC0). EEPROM is not affected. (Note 2)
This command writes to both the DAC input registers and EEPROM
sequentially. The sequential writing is carried out from a starting chan-
nel to channel D. The starting channel is defined by the DAC selection
bits (DAC1 and DAC0).
The input register is written at the acknowledge clock pulse of the last
input data byte of each register. However, the EEPROM data is written
altogether at the same time sequentially at the end of the last byte.
(Note 2),(Note 3)
This command writes to a single selected DAC input register and its
EEPROM. Both the input register and EEPROM are written at the
acknowledge clock pulse of the last input data byte. The writing chan-
nel is defined by the DAC selection bits (DAC1 and
(Note 2),(Note 3)
input register and EEPROM.
This command writes Reference (V
This command writes Gain selection bits of each channel.
This command writes Power-Down bits of each channel.
5.6
Table 5-1
their functions.The write command is defined by using
three write command type bits (C2, C1, C0) and two
write function bits (W1, W0). The register selection bits
(DAC1, DAC0) are used to select the DAC channel.
Write Commands for DAC
Registers and EEPROM
summarizes the write command types and
2
C address bits (A2, A1, A0) to the DAC
Function
REF
© 2009 Microchip Technology Inc.
) selection bits of each channel.
DAC0).