MCP4728 Microchip Technology Inc., MCP4728 Datasheet - Page 22

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MCP4728

Manufacturer Part Number
MCP4728
Description
12-bit, Quad Digital-to-analog Converter With Eeprom Memory
Manufacturer
Microchip Technology Inc.
Datasheet

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MCP4728
3.3
SDA is the serial data pin of the I
pin is used to write or read the DAC register and
EEPROM data. Except for start and stop conditions,
the data on the SDA pin must be stable during the high
duration of the clock pulse. The High or Low state of the
SDA pin can only change when the clock signal on the
SCL pin is Low.
The SDA pin is an open-drain N-channel driver.
Therefore, it needs a pull-up resistor from the V
to the SDA pin.
Refer
Communications” for more details of the I
Interface communication.
3.4
SCL is the serial clock pin of the I
MCP4728 device acts only as a slave and the SCL pin
accepts only external input serial clocks. The input data
from the Master device is shifted into the SDA pin on
the rising edges of the SCL clock and output from the
MCP4728 occurs at the falling edges of the SCL clock.
The SCL pin is an open-drain N-channel driver.
Therefore, it needs a pull-up resistor from the V
to the SCL pin.
Refer
Communications” for more details of I
Interface communication.
Typical range of the pull-up resistor value for SCL and
SDA is from 5 kΩ to 10 kΩ for standard (100 kHz) and
fast (400 kHz) modes, and less than 1 kΩ for high
speed mode (3.4 MHz).
DS22187A-page 22
to
to
Serial Clock Pin (SCL)
Serial Data Pin (SDA)
Section 5.0
Section 5.0
“I
“I
2
2
C
C
2
C interface. The SDA
Serial
Serial
2
C interface. The
2
Interface
Interface
2
C Serial
C Serial
DD
DD
line
line
3.5
This pin can be driven by an external control device
such as an MCU I/O pin. This pin is used (a) to transfer
the
corresponding DAC output registers and (b) to select a
device of interest when reading or writing I
bits. See sections Section 5.4.4 “General call Read
Address Bits” and Section 5.6.8 “Write Command:
Write I2C Address bits (C2=0, C1=1, C0=1)” for more
details of the reading and writing the device I
address bits, respectively.
When the logic status of the LDAC pin changes from
“High” to “Low”, the contents of all input registers
(Channels A - D) are transferred to their corresponding
output registers and all analog voltage outputs are
updated simultaneously.
If this pin is permanently tied to “Low”, the content of
the input register is transferred to its output register
(V
acknowledge pulse.
The user can also use the UDAC bit instead. However,
the UDAC bit updates a selected channel only. See
Section 4.8 “Output Voltage Update” for more
information on the LDAC pin and UDAC bit functions.
3.6
This pin is a status indicator of EEPROM programming
activity. This pin is “High” when the EEPROM has no
programming activity and “Low” when the EEPROM is
in programming mode. It goes “High” when the
EEPROM program is completed.
The RDY/BSY pin is an open-drain N-channel driver.
Therefore, it needs a pull-up resistor (about 100 kΩ)
from the V
OUT
contents
) immediately at the last input data byte’s
LDAC Pin
RDY/BSY Status Indicator Pin
DD
line to the RDY/BSY pin.
of
the
© 2009 Microchip Technology Inc.
input
registers
2
C address
to
their
2
C

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