EM6A9320 Etron Technology Inc., EM6A9320 Datasheet - Page 9

• Manufacturer Part Number: EM6A9320
• Description: 4M x 32 DDR SDRAM
• Manufacturer: Etron Technology Inc.

Et ronT ech
D.C. Characteristics
(V
OPERATING CURRENT : One bank; Active-Precharge;
t
changing once per clock cycle; Address and control inputs
changing once every two clock cycles.
OPERATING CURRENT : One bank; Active-Read-
Precharge; BL=4; CL=4; tRCDRD=4*t
t
changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT:
All banks idle; power-down mode; t
CKE=LOW
IDLE STANDLY CURRENT : CKE = HIGH;
CS#=HIGH(DESELECT); All banks idle; t
Address and control inputs changing once per clock cycle;
V
ACTIVE POWER-DOWN STANDBY CURRENT : one
bank active; power-down mode; CKE=LOW; t
ACTIVE STANDBY CURRENT : CS#=HIGH;CKE=HIGH;
one bank active ; t
control inputs changing once per clock cycle;
DQ,DQS,and DM inputs changing twice per clock cycle
OPERATING CURRENT BURST READ : BL=2; READS;
Continuous burst; one bank active; Address and control
inputs changing once per clock cycle; t
lout=0mA;50% of data changing on every transfer
OPERATING CURRENT BURST Write : BL=2; WRITES;
Continuous Burst ;one bank active; address and control
inputs changing once per clock cycle; t
DQ,DQS,and DM changing twice per clock cycle; 50% of
data changing on every transfer
AUTO REFRESH CURRENT : t
t
SELF REFRESH CURRENT: Sell Refresh Mode ;
CKE<=0.2V;t
BURST OPERATING CURRENT 4 bank operation:
Four bank interleaving READs; BL=4;with Auto Precharge;
t
inputschang only during Active, READ , or WRITE
command
Note:
1. Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent
2. All voltages are referenced to V
3. These parameters depend on the cycle rate and these values are measured by the cycle rate
4. Power-up sequence is described in previous page.
Etron Confidential
RC
CK
CK
RC
IN
DD
=t
=t
=t
=t
damage of the device.
under the minimum value of t
=V
= 2.8V ± 5% for 350, 333, 300, or 285MHz, V
CK
CK
RC
RC
REF
(min); lout=0mA; Address and control inputs
(min)
(min); t
(min); t
for DQ, DQS and DM
CK
CK
CK
Parameter & Test Condition
=t
=t
=t
CK
RC
CK
CK
(min)
=t
(min); DQ,DM and DQS inputs
(min); Address and control
RC
(max);t
RC
CK
CK
SS
=t
CK
and t
=t
.
RFC
CK
=t
CK
CK
CK
CK
(min);Address and
RC
; t
(min);
DD
CK
=t
=t
(min);
RC
. Input signals are changed one time during t
=2.5 ± 5% for 250 or 200MHz, T
CK
CK
=t
=t
CK
CK
(min);
(min);
RC
4Mx32 DDR SDRAM
=t
(min);
(min);
CK
(min)
9
Symbol
IDD4W 470 450 400 370 300 270 mA
IDD2N 100 100 100 100
IDD3N 140 135 120 110 100 100 mA
IDD4R 560 540 480 450 440 420 mA
IDD2P
IDD3P
IDD0
IDD1
IDD5
IDD6
IDD7
330 320 280 260 180 160 mA
450 440 380 360 260 240 mA
430 430 420 410 300 280 mA
920 890 780 720 650 550 mA
2.8 3.0 3.3 3.5
A
50
50
4
= 0~70 °C)
50
50
4
50
50
4
Max
Rev 0.3
50
50
4
CK
EM6A9320
.
4
45
80
45
3
5
40 mA
80 mA
40 mA
3 mA
Unit Notes
July. 2002