EM6A9320 Etron Technology Inc., EM6A9320 Datasheet
EM6A9320
Manufacturer Part Number
EM6A9320
Description
4M x 32 DDR SDRAM
Manufacturer
Etron Technology Inc.
Datasheet
1.EM6A9320.pdf
(16 pages)
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EM6A9320AI-3.3
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EM6A9320BI-2.8
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ETRONTECH
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Features
• Fast clock rate: 350/333/300/285/250/200 MHz
• Differential Clock CK & CK# input
• 4 Bi-directional DQS. Data transactions on both
• DLL aligns DQ and DQS transitions
• Edge aligned data & DQS output
• Center aligned data & DQS input
• 4 internal banks, 1M x 32-bit for each bank
• Programmable mode and extended mode registers
• Full page burst length for sequential type only
• Start address of full page burst should be even
• All inputs except DQ’s & DM are at the positive
• No Write-Interrupted by Read function
• 4 individual DM control for write masking only
• Auto Refresh and Self Refresh
• 4096 refresh cycles / 32ms
• Power supplies up to 350/333/300/285MHz:
• Power supplies up to 250/200MHz:
• Interface : SSTL_2 I/O compatible
•
EtronT ech
Etron Confidential
Etron Technology, Inc.
No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C.
TEL: (886)-3-5782345
Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.
- CAS# Latency: 3, 4, 5
- Burst length: 2, 4, 8
- Burst Type: Sequential & Interleave
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Ordering Information
edges of DQS (1DQS / Byte)
edge of the system clock
EM6A9320BI-2.8
EM6A9320BI-3.0
EM6A9320BI-3.3
EM6A9320BI-3.5
EM6A9320BI-4
EM6A9320BI-5
Part Number
V
V
V
V
DD
DDQ
DD
DDQ
= 2.8V ± 5%
= 2.5V ± 5%
= 2.8V ± 5%
= 2.5V ± 5%
Frequency
350MHz
333MHz
300MHz
285MHz
250MHz
200MHz
FAX: (886)-3-5778671
Power Supply
V
V
V
V
DDQ
DDQ
DD
DD
2.8V
2.5V
2.8V
2.5V
Overview
The EM6A9320 DDR SDRAM is a high-speed CMOS
double data rate synchronous DRAM containing 128
Mbits. It is internally configured as a quad 1M x 32
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal, CK).
Data outputs occur at both rising edges of CK and CK#.
Read and write accesses to the SDRAM are burst
oriented; accesses start at a selected location and
continue for a programmed number of locations in a
programmed sequence.
command, which is then followed by a Read or Write
command.
The EM6A9320 provides programmable Read or Write
burst lengths of 2, 4, 8. An auto precharge function may
be enabled to provide a self-timed row precharge that is
initiated at the end of the burst sequence.
The refresh functions, either Auto or Self Refresh are
easy to use.
In addition, EM6A9320 features programmable DLL
option. By having a programmable mode register and
extended mode register, the system can choose the
most suitable modes to maximize its performance.
These devices are well suited for applications requiring
high memory bandwidth, result in a device particularly
well suited to high performance main memory and
graphics applications.
Accesses begin with the registration of a BankActivate
Package
FBGA
FBGA
FBGA
FBGA
FBGA
FBGA
Preliminary (Rev 0.3 7/2002)
4M x 32 DDR SDRAM
EM6A9320
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