EM6607 EM Microelectronic, EM6607 Datasheet - Page 7

• Manufacturer Part Number: EM6607
• Description: Ultra-low power microcontroller
• Manufacturer: EM Microelectronic

2
The EM6607 has two low power dissipation modes: STANDBY and SLEEP. Figure 5 is a transition diagram for these modes.
2.1
The active mode is the actual CPU running mode. Instructions are read from the internal ROM and executed by the CPU.
Leaving active mode via the halt instruction to go into standby mode, the Sleep bit write to go into Sleep mode or a reset
from port A to go into reset mode.
2.2
Executing a HALT instruction puts the EM6607 into STANDBY mode. The voltage regulator, oscillator, Watchdog timer,
interrupts and timer/event counter are operating. However, the CPU stops since the clock related to instruction execution stops.
Registers, RAM, and I/O pins retain their states prior to STANDBY mode. A RESET or an Interrupt request cancel STANDBY
mode
2.3
Writing the SLEEP* bit in the IntRq* register puts the
EM6607 in SLEEP mode. The oscillator stops and most
functions of the EM6607 are inactive. To be able to write
the SLEEP bit, the SLmask bit must be first set to 1 in
register WD. In SLEEP mode only the voltage regulator
and RESET input are active. The RAM data integrity is
maintained. SLEEP mode may be cancelled only by a
RESET at the terminal pin of the EM6607 or by the
selected port A input reset combination. This combination
is a metal option, see paragraph
must be high for at least 10µsec.
Due to the cold start characteristics of the oscillator, waking up from SLEEP mode may take some time to guarantee that the
oscillator has started correctly. During this time the circuit is in RESET state and the strobe output STB/RST is high. Waking up
from SLEEP mode clears the SLEEP flag but not the SLmask bit. By reading SLmask it can therefore determine if the EM6607
was powered up (SLmask = 0), or woken from SLEEP mode (SLmask = 1).
Table 1.
* Write bit 2 only if SLmask=1
Copyright © 2005, EM Microelectronic-Marin SA
Bit
3
2
1
0
2
Operating modes
.
Active Mode
STANDBY Mode
SLEEP MODE
IntRq register
R
Name
INTPR
INTTE
INTPC
INTPA
SLEEP
1 5.1.2. The RESET port
1 3 0 H
Reset
0
0
0
0
0
R/W
R
R
R
R
W*
Figure 5. Mode Transition Diagram
Description
Prescaler interrupt request
Timer/counter interrupt request
PortC Interrupt request
PortA Interrupt request
SLEEP mode flag
7
Standby
instruction
Reset=1
Halt
IRQ
Reset=1
Active
Reset
Reset=0
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EM6607
Reset=1
Sleep bit
write
Sleep