EM6607 EM Microelectronic, EM6607 Datasheet - Page 16

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EM6607

Manufacturer Part Number
EM6607
Description
Ultra-low power microcontroller
Manufacturer
EM Microelectronic
Datasheet

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7.3
This port can be configured as either input or output (but it is not bitwise selectable). When in input mode it implements the
identical interrupt functions as PortA. The PortC register is used to read data when input mode and to write data when in
output mode. Input mode is set by writing 0 in the I/O control bit CIOPC in register CPIOB, the input becomes high
impedance. On each terminal controlled Pull-Up/Down resistor can be selected by metal option, which are active only when
port is input. When we want to use internal Strong pull-up resistor also when PortC terminal is declared as N-channel open
drain output and internal pull-up resistor is used to pull up the output (not-controlled pull-up). This is a special option “sod” =
strong pull-up for Open drain- active all the time (when terminal is input or output).
The output mode is selected by writing 1 to CIOPC bit, and the terminal follows the bits in the PortC register. When PortC is
used as an input, interrupt functions as described for PortA can be enabled. Input to the interrupt logic can be direct or via a
debounced input. With the debPCN bit at 0 in the Option register all the PortC inputs are debounced and with the debPCN
bit at 1 none of the PortC inputs are debounced. MPortC is the interrupt mask register for this port and IRQpC is the portC
interrupt request register. See also section 9.
By writing the PA&C bit in the CPIOB data register it is
possible to combine PortA and PortC interrupt requests
(logic AND) as shown in Table 17
At initial reset, the CPIOC control register is set to 0, and the
port is in input mode. The MPortC register is also set to 0,
therefore disabling interrupts.
7.3.1
Table 19.
Table 20.
Table 21.
Copyright © 2005, EM Microelectronic-Marin SA
Bit
3
2
1
0
Bit
3
2
1
0
Bit
3
2
1
0
PortC
PortC registers
PortC input/output register - PortC
PortC Interrupt request register - IRQpC
PortC interrupt mask register - MportC
R
Name
PC3
PC2
PC1
PC0
Name
IRQpc3
IRQpc2
IRQpc1
IRQpc0
Name
MPC3
MPC2
MPC1
MPC0
Reset
-
-
-
-
Reset
0
0
0
0
Reset
0
0
0
0
R/W
R/W
R /W
R/W
R /W
R/W
R
R
R
R
R/W
R/W
R/W
R/W
R/W
Description
PC3 I/O data
PC2 I/O data
PC1 I/O data
PC0 I/O data
Description
input PC3 interrupt request flag
input PC2 interrupt request flag
input PC1 interrupt request flag
input PC0 interrupt request flag
Description
interrupt mask for input PC3
interrupt mask for input PC2
interrupt mask for input PC1
interrupt mask for input PC0
16
Table 18.
IRQPA
0
0
1
1
0
1
1
Ports A&C Interrupt
IRQPC
0
1
0
1
1
0
1
PA&C
X
0
0
0
1
1
1
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No
Yes
Yes
Yes
No
No
Yes
Request to CPU
EM6607

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