AN2797 Freescale Semiconductor / Motorola, AN2797 Datasheet - Page 19

• Manufacturer Part Number: AN2797
• Description: Migrating from IBM 750GX to MPC7447A
• Manufacturer: Freescale Semiconductor / Motorola

4.2.1.1 Dual PLL Configuration
The 750GX has dual PLL allowing the frequency to be selected from PLL0 or PLL1 where the transition is
controlled through software. A change in clock frequency will take three cycles to complete.
Due to the presence of dual PLL, a change in frequency involves a few parameters to be changed in sequence. An
example of this would be in changing from PLL0 as the source currently to PLL1 as shown,
Table 5
1.
The PLL range is configured according to the frequency ranges shown in
4.2.1.2 DFS Configuration
The configuration of DFS is comparatively simple given the fact that it does not use dual PLL. DFS allows the core
clock frequency to be halved.
Freescale Semiconductor
000 - Factory use, 001 - PLL0 core clock (freq/2), 010 - Factory use, 011 – PLL1 core clock (freq/2), 100 - Factory use, 101 -
Core clock (freq/2)
1. Configure PLL1 to produce the desired clock frequency, by setting HID1[PR1] and HID1[PC1] to the
2. Set HID1[PS] to select PLL1 as the processor clock source.
3. After 3 cycles PLL1 will be the source and the HID1 status fields will be updated.
below shows the fields in HID1 required to configure and change between the two PLL.
appropriate values. Bear in mind there is a delay until PLL1 locks which we have to wait for.
Function
PLL external configuration, PLL_CFG[0-4] (Read only)
PLL external range configuration (Read only)
PLL status/selection
Enable external clock, CLKOUT
Internal clock to output, CLKOUT, selection
PLL0 internal configuration select
PLL select
PLL0 configuration
PLL0 range select
PLL1 configuration
PLL1 range select
Migrating from IBM 750GX to MPC7447A, Rev. 1.0
Table 5. IBM 750GX HID1/Dual PLL Settings
PLL_RNG[0:1]
11 (reserved)
00 (default)
Table 6. PLL Range Configuration
10 (slow)
01 (fast)
PLL Frequency Range
600 MHz–900 MHz
500 MHz–600 MHz
900 MHz–1.0 GHz
Reserved
Table
IBM 750GX
HID1[PCE]
HID1[PRE]
HID1[PSTAT1]
HID1[ECLK]
HID1[9-11]
HID1[PIO]
HID1[PS]
HID1[PC0]
HID1[PR0]
HID1[PC1]
HID1[PR1]
6.
1
Programming Model
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