AN2797 Freescale Semiconductor / Motorola, AN2797 Datasheet - Page 17

• Manufacturer Part Number: AN2797
• Description: Migrating from IBM 750GX to MPC7447A
• Manufacturer: Freescale Semiconductor / Motorola

4.1
Although both the IBM 750GX and MPC7447A have both of these registers defined in their implementation, the
registers are optional to the standard and therefore differences in bit settings between devices do exist.
summarizes these differences and shows the mapping of fields between devices.
Freescale Semiconductor
Differences in HID0 and HID1
Function
Enable MCP
Disable 60x bus address and data parity
generation
Enable 60x bus address parity checking
Enable 60x bus data parity checking
Disable precharge of ARTRY
Doze mode enable
Nap mode enable
Sleep mode enable enable
Dynamic power management enable
Read instruction segment register
Miss-under-miss enable enable
Not a hard reset
Instruction cache enable
Data cache enable
Instruction cache lock
Data cache lock
Instruction cache flush invalidate
Data cache flush invalidate
Speculative data and instruction cache
disable
Enable M bit on bus for instruction fetches
(M from WIM states)
Store gathering enable
Data cache flush assist
BTIC enable
Address broadcast enable
Table 4. IBM 750GX HID0 to MPC7447A Mapping
Migrating from IBM 750GX to MPC7447A, Rev. 1.0
HID0[DLOCK]
HID0[SLEEP]
HID0[RISEG]
HID0[ILOCK]
HID0[EMCP]
HID0[DOZE]
HID0[DCFA]
IBM 750GX
HID0[MUM]
HID0[DCFI]
HID0[IFEM]
HID0[DPM]
HID0[NHR]
HID0[BTIC]
HID0[DBP]
HID0[EBD]
HID0[NAP]
HID0[DCE]
HID0[SPD]
HID0[SGE]
HID0[EBA]
HID0[PAR]
HID0[ICFI]
HID0[ABE]
HID0[ICE]
MPC7447A
HID0[DLOCK]
HID0[SLEEP]
HID0[ILOCK]
HID1[EMCP]
HID1[ABE]
HID0[DCFI]
HID0[BTIC]
HID0[DPM]
HID0[NHR]
HID1[EBA]
HID1[EBA]
HID0[NAP]
HID0[DCE]
HID0[SPD]
HID0[SGE]
HID1[PAR]
HID0[ICFI]
HID0[ICE]
HID0[23]
HID0[25]
N/A
N/A
N/A
N/A
1
2
3
4
5
6
Programming Model
7
Table 4
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