AN2536 Freescale Semiconductor / Motorola, AN2536 Datasheet - Page 8

• Manufacturer Part Number: AN2536
• Description: MC9328MX1 and MC9328MXL High Speed Layout Design Guidelines
• Manufacturer: Freescale Semiconductor / Motorola

Design Consideration
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noise is filtered by a large 10-uF capacitor after the ferrite bead. Usually, elements on the PCB add high-
frequency noise to the power plane. To filter the high-frequency noise at the device, place decoupling
capacitors as close as possible to each VCC and GND pair.
Power Distribution
A system can distribute power throughout the PCB with either power planes or a power bus network. You
can use power planes on multi-layer PCBs that consist of two or more metal layers that carry VCC and
GND to the devices. Because the power plane covers the full area of the PCB, its DC resistance is very
low. The power plane maintains VCC and distributes it equally to all devices while providing very high
current-sink capability, noise protection, and shielding for the logic signals on the PCB. It is recommended
to use lower planes to distribute power. The power bus network—which consists of two or more wide
metal traces that carry VCC and GND to devices—is often used on two-layer PCBs and is less expensive
than power planes. When designing with power bus networks, be sure to keep the trace widths as wide as
possible. The main drawback to using power bus networks is significant DC resistance. It is recommended
to separate analog and digital power planes. For fully digital systems that do not already have a separate
analog power plane, it can be expensive to add new power planes. However, you can create partitioned
islands (split planes). An example board layout with phase-locked loop (PLL) ground islands is shown on
Figure 12.
If your system shares the same plane between analog and digital power supplies, there may be unwanted
interaction between the two circuit types. The following suggestions will help to reduce noise:
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For equal power distribution, use separate power planes for the analog (PLL) power supply. Avoid
using trace or multiple signal layers to route the PLL power supply.
Use a ground plane next to the PLL power supply plane to reduce power-generated noise.
Place analog and digital components only over their respective ground planes.
Figure 12. Example Board Layout with Phase Locked Loop (PLL) Ground Islands
Freescale Semiconductor, Inc.
For More Information On This Product,
Figure 11. Power Noise Filtering Example
MC9328MX1/MXL Application Note
Go to: www.freescale.com
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