AN2497 Freescale Semiconductor / Motorola, AN2497 Datasheet - Page 8

• Manufacturer Part Number: AN2497
• Description: HCS08 Background Debug Mode versus HC08 Monitor Mode
• Manufacturer: Freescale Semiconductor / Motorola

AN2497/D
Active Background
Mode Commands
READ_CCR,
WRITE_CCR,
READ_A, WRITE_A,
READ_HX,
WRITE_HX,
READ_SP,
WRITE_SP,
READ_PC, and
WRITE_PC
TRACE1
GO and TAGGO
READ_NEXT_WS
and
WRITE_NEXT_WS
Non-Intrusive
Commands
WRITE_CONTROL
READ_STATUS
BACKGROUND
SYNC
READ_LAST,
READ_BYTE, and
WRITE_BYTE
8
HCS08 Background Debug Mode versus HC08 Monitor Mode
CPU registers such as accumulator (A), stack pointer (SP), H and X register
pair (H:X), program counter (PC) and condition code register (CCR) can be
directly read or written by the active background commands. The non-intrusive
commands cannot access these registers.
This command is used for tracing one user instruction. (For the HC08, this
function is performed by using the break module or SWI instruction.)
These commands are used for executing the user application program and are
the same as the HC08 monitor RUN command.
These commands are used in the active background mode for reading and
writing data to an address specified in the H:X registers. These commands
report the contents of the BDCSCR register when they are executed.
This command is used for writing the BDCSCR register. This is the only
command that allows the user to write the ENBDM bit in the BDCSCR register
since BDCSCR is not in the user memory map.
This command is used for reading the contents of the BDCSCR register.
This command is used for switching from the normal user mode to the active
background mode. However if the ENBDM bit is cleared, this command is
ignored. When the target CPU is in wait or stop mode, most BDC commands
cannot function. However, the BACKGROUND command can be used to force
the target CPU out of wait or stop mode and into the active background mode
if the BDM is enabled (ENBDM = 1).
This command is performed by driving the BKGD pin low for at least 128 cycles
of the slowest possible BDC clock. This command is used for detecting a BDC
communication speed by receiving a 128-BDM-cycle low pulse on the BKGD
pin from the target MCU.
Memory access commands can read or write memory not only in the active
background mode but also while the user application code is running.
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