AN2497 Freescale Semiconductor / Motorola, AN2497 Datasheet - Page 7

• Manufacturer Part Number: AN2497
• Description: HCS08 Background Debug Mode versus HC08 Monitor Mode
• Manufacturer: Freescale Semiconductor / Motorola

BDC Commands – Active Background Mode and Non-Intrusive
MOTOROLA
HCS08 Background Debug Mode versus HC08 Monitor Mode
The other register is called the BDC breakpoint register (BDCBKPT). This
16-bit register contains the address for the BDC hardware breakpoint. Although
it can be read and written by the debugger while a user program is running, it
is normally only written while in active background mode.
In addition to the above registers, there are two device identification registers
that contain a part identification code and mask set version number. These
registers are called the system device identification registers (SDIDH:SDIDL)
and consist of 2 bytes. This identification code allows the debugger or
programmer to select a proper setup associated to a particular target MCU,
such as memory map, size, registers, etc. These two registers are accessible
to the user program and the debugger.
A special control register called the system background debug force reset
register (SBDFR) is also available to the debugger. This register contains a
single control bit (BDFR) the debugger can use to force an MCU reset without
having to access the RESET pin. This register is accessible only from the active
background mode so the bit is protected from unintentional writing in the user
program.
In HCS08 MCUs, many flexible operations are included in the background
commands. The BDC commands are divided into two distinct groups called
“active background mode” and “non-intrusive.” The active background mode
commands can only be used when the MCU is not running a user program. On
the other hand, the non-intrusive commands can be used when the MCU is in
normal user mode or active background mode. These commands do not affect
the real-time operation of the user program even when the user program is
running.
As mentioned in the previous section, the BDCSCR register contains the BDC
status bits. Some of BDC commands report the contents of the BDCSCR
register when they are executed. The status report is very helpful to understand
not only the current condition of the CPU (the CPU is in stop or wait mode) but
also the validity of the read/write data.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
BDC Commands – Active Background Mode and Non-Intrusive
AN2497/D
7