AN2400 Freescale Semiconductor / Motorola, AN2400 Datasheet - Page 16

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AN2400

Manufacturer Part Number
AN2400
Description
HCS12 NVM Guidelines
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
AN2400/D
Illegal Flash
Operations
16
The ACCERR flag will be set during the command write sequence if any of the
following illegal operations are performed causing the command write
sequence to immediately abort:
The ACCERR flag will not be set if any Flash register is read during the
command sequence.
If the Flash array is read during execution of an algorithm (i.e. CCIF bit in the
FSTAT register is clear) the read will return non valid data and the ACCERR
flag will not be set.
If an ACCERR flag is set in any of the FSTAT registers the Command State
Machine is locked. It is not possible to launch another command on any block
until the ACCERR flag is cleared.
The PVIOL flag will be set during the command write sequence after the word
write to the Flash address space if any of the following illegal operations are
performed, causing the command sequence to immediately abort:
10. Writing to any Flash register other than FSTAT (to clear CBEIF) after
11. If the microcontroller enters STOP mode while a command is in
12. A “0” is written to the CBEIF bit in the FSTAT register.
1. Writing to the Flash address space before initializing FCLKDIV.
2. If the microcontroller has multiple Flash blocks, writing to the Flash
3. If the microcontroller has multiple Flash blocks, writing to the Flash
4. Writing a misaligned word or a byte to the valid Flash address space.
5. Writing to the Flash address space while CBEIF is not set.
6. Writing a second word to the Flash address space before executing a
7. Writing to any Flash register other than FCMD after writing a word to the
8. Writing a second command to the FCMD register before executing the
9. Writing an invalid user command to the FCMD register in user mode.
1. Writing a Flash address to program in a protected area of the Flash.
2. Writing a Flash address to erase in a protected area of the Flash.
Freescale Semiconductor, Inc.
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address space in the range $8000
not select a 16K bytes page in the Flash block selected by the BKSEL
bits in the FCNFG register.
address space $4000
the FCNFG register not selecting Flash block 0.
valid command on the previously written word.
Flash address space.
previously written command.
writing to the command register, FCMD.
progress, the command is aborted and any pending command is
aborted.
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HCS12 NVM Guidelines
$7FFF or $C000
$BFFF when PPAGE register does
$FFFF with the BKSEL bits in
MOTOROLA

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