AN2372 Freescale Semiconductor / Motorola, AN2372 Datasheet - Page 19

• Manufacturer Part Number: AN2372
• Description: Using the Output Compare TPU Function (OC) with the MPC500Family
• Manufacturer: Freescale Semiconductor / Motorola

State 3: Init (Continuous Pulse Mode)
Clear flag1
Generate a match at (REF_ADDR3)
}
/* set up for first match after initialization */
OFFSET replaced by (REF_ADDR2) ? RATIO Negate LSR
9.3
This state is entered as a result of an HSR%11. The channel is configured as specified by
CHANNEL_CONTROL. When asserted, flag0 indicates the continuous pulse mode.
Condition: HSR1, HSR0, M/TSR, LSR, Pin, Flag0 = 0010x1 Match Enable: Don't Care
Set PAC = toggle
If (OFFSET ? 0) then {
/* Do state 1 Init */
Configure channel latches via parameter CHANNEL_CONTROL Enable M/TSR
Assert flag1, assert flag0
ACTUAL_MATCH_TIME = ERT
Negate MRL, TDL, LSR
Assert interrupt request
} else {
REF_TIME = REF_TIME + OFFSET Generate a match at REF_TIME + OFFSET Clear flag1, negate MRL
Assert interrupt request
}
9.4
This state is entered as a result of an LSR received in the continuous pulse mode. The channel is configured
as specified in CHANNEL_CONTROL. A new value of OFFSET is calculated, and REF_TIME is updated
with a value pointed to by REF_ADDR1, unless this is the first execution of this state after execution of Init.
In the first execution after Init, a match event is set up to be generated at the contents pointed to by
REF_ADDR3, and REF_TIME is updated with the new match value. Flag1 is negated.
Condition: HSR1, HSR0, M/TSR, LSR, Pin, Flag0 = 01xxxx Match Enable: Disable
TCR1 copied to absolute parameter word address 0xEC TCR2 copied to absolute parameter word address
0xEE
If (host sequence bit 1 = 1) { Assert interrupt request
} Else {
Configure channel latches via parameter CHANNEL_CONTROL Enable M/TSR
Clear flag0, clear flag1
19
State 3: Init (Continuous Pulse Mode)
State 4: Offset_Cal
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Using the Output Compare TPU Function
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