AN2372 Freescale Semiconductor / Motorola, AN2372 Datasheet

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AN2372

Manufacturer Part Number
AN2372
Description
Using the Output Compare TPU Function (OC) with the MPC500Family
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Application Note
AN2372/D
Rev. 0, 10/2002
Using the Output
Compare TPU Function
(OC) with the MPC500
Family
John Honnold
TECD
This TPU Programming Note is intended to provide simple C interface routines to the output
compare TPU function (OC).
but they should be easy to use with any device that has a TPU.
1
The output compare (OC) function can generate a single output transition, a single pulse, or a
continuous 50% duty cycle pulse train upon receiving a link from another channel. The first
two actions require the CPU to initiate each output edge or pulse. The third action generates a
continuous square wave without CPU intervention. OC can also be used to read the most
recent TCR1 and TCR2 values.
2
Depending on the state of the host service request bits, the OC function performs in one of two
modes:
The two modes are described in greater detail in the following paragraphs.
1
The information in this Programming Note is based on TPUPN12. It is intended to
compliment the information found in that Programming Note.
If the host service request bits are %01 (host-initiated pulse mode), OC updates the
parameter RAM word locations 0x304yEC and 0x304yEE (where y = 1 for TPU
Bank 0 and y = 5 for Bank 1) with the most recent TCR1 and TCR2 values,
respectively. If the host sequence bits are %1x, it requests an interrupt and completes
execution. However, if the host sequence bits are %0x, it immediately forces the
initial pin level to the state specified in the CHANNEL_CONTROL pin state control
(PSC) field (if a state is specified). It then generates an output transition at a
programmable delay from a user-specified time and requests an interrupt.
If the host service request bits are %11 (continuous pulse mode), then when OC
receives a link, it calculates the parameter OFFSET by multiplying the parameter
RATIO by the contents of the parameter pointed to by REF_ADDR2. It then
generates a 50% duty-cycle continuous square wave without CPU intervention. Each
high/low time is equal to the calculated OFFSET. Each new link received causes a
new OFFSET to be calculated. The new OFFSET is used at the subsequent transition
in the generation of the square wave.
Freescale Semiconductor, Inc.
Functional Overview
Detailed Description
For More Information On This Product,
Go to: www.freescale.com
1
The routines are targeted for the MPC500 family of devices,

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AN2372 Summary of contents

Page 1

... Freescale Semiconductor, Inc. Application Note AN2372/D Rev. 0, 10/2002 Using the Output Compare TPU Function (OC) with the MPC500 Family John Honnold This TPU Programming Note is intended to provide simple C interface routines to the output compare TPU function (OC). TECD but they should be easy to use with any device that has a TPU. ...

Page 2

Freescale Semiconductor, Inc. Host-Initiated Pulse Mode 2.1 Host-Initiated Pulse Mode In host-initiated pulse mode, the CPU initiates a single transition: rising, falling toggle of the previous state. The CPU can force an immediate output, generating a pulse whose ...

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Freescale Semiconductor, Inc. (REF_ADDR1) OFFSET A) IMMEDIATE OUTPUT SELECTED (REF_ADDR1) OFFSET B) IMMEDIATE OUTPUT NOT SELECTED Figure 1. Host-Initiated Pulse Mode Diagram 2.2 Continuous Pulse Mode In continuous mode, the OC function generates a continuous square wave with a 50% ...

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Freescale Semiconductor, Inc. Continuous Pulse Mode FIRST LINK OUT OF INITIALIZATION REF_TIME = (REF_ADDR3) REF_TIME = (REF_TIME) + OFFSET OFFSET = (REF_ADDR2) * RATIO Figure 2. Continuous Pulse Mode Diagram Each time a match event occurs, the pin state changes, ...

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Freescale Semiconductor, Inc. 3 Function Code Size Total TPU function code size determines what combination of functions can fit into a given ROM or emulation memory microcode space. OC function code size is: 31 instructions + 8 entries = 39 ...

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Freescale Semiconductor, Inc. CHANNEL_CONTROL Table 1. TPU Channel Parameter RAM CPU Address Map (continued) Channel Base Number Address 10 0x30YY## 11 0x30YY## 12 0x30YY## 13 0x30YY## 14 0x30YY## 15 0x30YY## Figure 4. Parameter RAM Assignment 4.1 CHANNEL_CONTROL CHANNEL_CONTROL contains the ...

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Freescale Semiconductor, Inc. Table 2. OC CHANNEL_CONTROL Options TBS PAC PSC ...

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Freescale Semiconductor, Inc. REF_ADDR2 4.5 REF_ADDR2 REF_ADDR2 is also a pointer into the parameter RAM map used only in continuous mode. It points to a reference value that is scaled by the RATIO parameter to form a new ...

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Freescale Semiconductor, Inc. Address 15 0x30YY0E 0x30YY10 0x30YY12 0x30YY14 0x30YY16 0x30YY18 0x30YY1A 0x30YY1C 0x30YY1E 0x30YY20 0x30YY22 0x30YY24 0x30YY26 CIER - Channel Interrupt Enable Register CH15 CH14 CH13 CH12 CH11 CH10 CH9 Channel CFSR[0:3] - Channel ...

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Freescale Semiconductor, Inc. ACTUAL_MATCH_TIME Channel 0x All code associated with host pulse mode is executed. 1x During execution of the host pulse mode, only the code that updates word locations 0xEC and 0xEE with TCR1 and TCR2, respectively, is executed. ...

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Freescale Semiconductor, Inc. 6 Function Configuration The CPU configures the OC function as follows Writes parameters CHANNEL_CONTROL, REF_ADDR1, and other parameters, depending on the mode of operation, to RAM Writes host sequence bit 1 according to ...

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Freescale Semiconductor, Inc. Changing Mode State Number and Name S1 Init S2 Offset_Cal (first link after Init) S3 Offset_Compare 0 < OFFSET = 0x7FFF 0x7FFF < OFFSET = 0 S4 Host Compare HSB = 0X HSB = 1X S5 Ref_Time_Compare ...

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Freescale Semiconductor, Inc. Example 0x304100 0x304102 X ...

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Freescale Semiconductor, Inc. Example 0x304120 0x304122 X X ...

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Freescale Semiconductor, Inc. Example B The host sequence field bits are set to %01, to accumulate 16-bit periods and generate links. The host service request bits are set to %10, for initialization. Load parameter RAM as shown ...

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Freescale Semiconductor, Inc. Example 0xYFFF30 0xYFFF32 X X ...

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Freescale Semiconductor, Inc. Example 0x304120 0x304122 0 ...

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Freescale Semiconductor, Inc. State 1: HOST_MATCH (Host-Initiated Pulse Mode) size. TPU microcode source listings for all functions in the TPU function library can be downloaded from the Motorola Freeware bulletin board. Refer to Using the TPU Function Library and TPU ...

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Freescale Semiconductor, Inc. State 3: Init (Continuous Pulse Mode) Clear flag1 Generate a match at (REF_ADDR3 set up for first match after initialization */ OFFSET replaced by (REF_ADDR2) ? RATIO Negate LSR 9.3 State 3: Init (Continuous Pulse ...

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Freescale Semiconductor, Inc. State 5: Offset_Match temp = (REF_ADDR1) Generate match at temp + OFFSET REF_TIME = temp + OFFSET Negate MRL } 9.5 State 5: Offset_Match This state is entered as a result of a match event in the ...

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Freescale Semiconductor, Inc. State 5: Offset_Match Figure 5. Output Compare State Flowchart 21 Using the Output Compare TPU Function For More Information On This Product, Go to: www.freescale.com MOTOROLA ...

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Freescale Semiconductor, Inc. State 5: Offset_Match THIS PAGE INTENTIONALLY LEFT BLANK 22 Using the Output Compare TPU Function For More Information On This Product, Go to: www.freescale.com MOTOROLA ...

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Freescale Semiconductor, Inc. State 5: Offset_Match THIS PAGE INTENTIONALLY LEFT BLANK 23 Using the Output Compare TPU Function For More Information On This Product, Go to: www.freescale.com MOTOROLA ...

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... Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. All other product or service names are the property of their respective owners. Motorola, Inc Equal Opportunity/Affirmative Action Employer. © Motorola, Inc. 2002 AN2372/D For More Information On This Product, Go to: www.freescale.com ...

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