CY2PP3210 Cypress Semiconductor, CY2PP3210 Datasheet - Page 5

no-image

CY2PP3210

Manufacturer Part Number
CY2PP3210
Description
Dual 1:5 Differential Clock / Data Fanout Buffer
Manufacturer
Cypress Semiconductor
Datasheet
Document #: 38-07508 Rev.*C
Test Configuration
Standard test load using a differential pulse generator and
differential measurement instrument.
Figure 3. Propagation Delay (T
Z = 5 0 o h m
G e n e ra to r
P u ls e
20-80%
for both CLKA or CLKB to Output Pair, PECL/ECL to PECL/ECL
A n o t h e r
tr, tf,
O u t p u t
O u t p u t
C l o c k
C l o c k
C l o c k
I n p u t
Z o = 5 0 o h m
T P L H ,
T P D
R
R
T
T
PD
Figure 4. CY2PP318 AC Test Reference
= 5 0 o h m
= 5 0 o h m
), output pulse skew (|t
Figure 2. ECL/LVPECL Output
V T T
V T T
C Y 2 P P 3 2 1 0
D U T
PLH
-t
PHL
T P H L
Z o = 5 0 o h m
|), and output-to-output skew (t
5 "
5 "
t S K ( O )
V T T
V T T
FastEdge™ Series
V P P
VO
R
R
T
T
V O
= 5 0 o h m
= 5 0 o h m
CY2PP3210
SK(O)
)
Page 5 of 9

Related parts for CY2PP3210