CY2PP3210 Cypress Semiconductor, CY2PP3210 Datasheet
CY2PP3210
Related parts for CY2PP3210
CY2PP3210 Summary of contents
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... GHz. The device features two differential input paths that are differ- ential internally. The CY2PP3210 may function not only as a differential clock buffer but also as a signal-level translator and fanout distributing a single-ended signal. An external bias pin, VBB, is provided for this purpose ...
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... QA(0:4) 30,28,26,23,21 QA#(0:4) 20,18,15,13,11 QB(0:4) 19,17,14,12,10 QB#(0:4) Governing Agencies The following agencies provide specifications that apply to the CY2PP3210. The agency name and relevant specification is listed below in Table 2. Table 1. Agency Name JEDEC JESD 020B (MSL) JESD 51 (Theta JA) JESD 8–2 (ECL) JESD 65–B (skew,jitter) Mil-Spec 883E Method 1012.1 (Thermal Theta JC) Notes: 1 ...
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... Single-ended operation Single-ended operation [6] Relative – (number of differential outputs used =(V -V )/50; I =(V -V OHMIN OHMIN TT OHMAX OHMAX TT CC FastEdge™ Series CY2PP3210 Min. Max. –0.3 4.6 -4.6 0.3 –65 +150 150 2000 3 50 Min. Max. – |200| 100 –40 +85 [4] 29 [4] 76 [5] – ...
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... MHz , See Figure 3 660 MHz 50% duty cycle Differential 20% to 80% VPP range 0.1V - 1.3V VCMR VEE + 1.2 Figure 1. PECL/ECL Input Waveform Definitions – PLH PHL FastEdge™ Series CY2PP3210 Min. Max. –2.625 –2.375 –3.465 –3.135 –1.25 –0.7 –1.995 – ...
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... Figure 4. CY2PP318 AC Test Reference FastEdge™ Series CY2PP3210 |), and output-to-output skew (t SK( " " ...
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... Figure 6. Driving a PECL/ECL Single-ended Input " " naling (LVDS) Interface FastEdge™ Series CY2PP3210 ...
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... Document #: 38-07508 Rev.*C VDD-2 VCC One output is shown for clarity and supplies. Package Type 32-pin TQFP 32-pin TQFP – Tape and Reel FastEdge™ Series CY2PP3210 Product Flow Industrial, –40° to 85°C Industrial, –40° to 85°C Page ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. FastEdge™ Series CY2PP3210 Dimensions are in mm 51-85088-*B ...
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... Document History Page Document Title: CY2PP3210 FastEdge™ Series Dual 1:5 Differential Clock/Data Fanout Buffer Document Number: 38-07508 Issue REV. ECN NO. Date ** 122396 02/12/03 *A 125458 04/17/03 *B 229370 See ECN *C 247616 See ECN Document #: 38-07508 Rev.*C Orig. of Change RGL New Data Sheet RGL Corrected pins from Q2#, Q2, Q1#, Q1, Q0 QA2#, QA2, ...