CY26049-36 Cypress Semiconductor, CY26049-36 Datasheet - Page 5

• Manufacturer Part Number: CY26049-36
• Description: Global Communications Clock Generator
• Manufacturer: Cypress Semiconductor

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Document #: 38-07415 Rev. *C
DC Electrical Specifications
AC Electrical Specifications
Voltage and Timing Definitions
Note:
I
I
V
V
I
I
C
I
I
f
f
LR
DC = t
T
T
t
t
f
ER
EF
Parameter
3.
OH
OL
IH
IL
OZ
DD
ICLK-E
ICLK-B
6
fs_lock
error
Parameter
PJIT1
PJIT2
IH
IL
IN
Dependent on crystals chosen and crystal specs.
2
/t
1
Frequency, Input Clock
Frequency, Input Clock
FailSafe Lock Range
Output Duty Cycle
Clock Jitter; output > 5 MHz Period Jitter, Peak to Peak, 10,000 periods
Clock Jitter; output <5 MHz Period Jitter, Peak to Peak, 10,000 periods
PLL Lock Time
Failsafe Lock Time
Frequency Synthesis Error
Rising Edge Rate
Falling Edge Rate
Output High Current
Output Low Current
Input High Voltage
Input High Voltage
Input High Current
Input Low Current
Input Capacitance
Output Leakage Current
Supply Current
Description
Figure 2. Rise and Fall Time Definitions: ER = 0.6 x VDD / t3, EF = 0.6 x VDD / t4
Description
[3]
(Industrial Temp: –40° to 85°C)
(Commercial Temp: 0° to 70° C and Industrial Temp: –40° to 85°C)
CLK
V
V
CMOS Levels
CMOS Levels
V
V
High Z
C
C
Input Clock Frequency, External Mode
Input Clock Frequency, Buffer Mode
Range of reference ICLK for Safe = High
Duty Cycle defined in Figure 1, measured at 50% of V
RMS Period Jitter, RMS
RMS Period Jitter, RMS
Time for PLL to lock within ± 150 ppm of target frequency
Time for PLL to lock to ICKL (outputs phase aligned with
ICKL and Safe = High)
Actual mean frequency error vs. target
Output Clock Edge Rate, Measured from 20% to 80% of
V
Output Clock Edge Rate, Measured from 20% to 80% of
V
Figure 1. Duty Cycle Definition; DC = t2/t1
OH
OL
IH
IL
LOAD
LOAD
DD
DD
CLK
= 0V
= V
, C
, C
= 0.5, V
= V
[1]
= 15 pF, V
= 15 pF, V
LOAD
LOAD
DD
DD
output
50%
– 0.5, V
t1
DD
t2
= 15 pF See Figure 2.
= 15 pF See Figure 2.
t3
= 3.3V (sink)
DD
DD
Test Conditions
DD
Test Conditions
= 3.45V, FS [3:0] = 0100
= 3.45V, FS [3:0] = 1101
80%
20%
= 3.3V (source)
50%
t4
DD
Min.
0.7
10
10
–250
Min.
–
–
–
–
–
–
–
0.8
0.8
10
45
–
–
–
–
–
–
–
–
CY26049-36
Typ.
± 5
20
20
8.00
Typ.
–
–
5
5
–
–
–
1.4
1.4
50
–
–
–
–
–
–
–
–
0
Max.
0.3
10
10
50
35
Max. Unit
+250 ppm
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–
–
–
7
–
250
500
100
60
55
50
–
3
7
–
2
2
Unit
V
V
mA
mA
mA
mA
MHz
µA
µA
pF
µA
ppm
V/ns
V/ns
kHz
DD
DD
ms
ps
ps
ps
ps
%
s