CY26049-22 Cypress Semiconductor, CY26049-22 Datasheet

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CY26049-22

Manufacturer Part Number
CY26049-22
Description
Global Communications Clock Generator
Manufacturer
Cypress Semiconductor
Datasheet
www.DataSheet4U.com
Cypress Semiconductor Corporation
Document #: 38-07730 Rev. **
Features
• Fully integrated phase-locked loop (PLL)
• FailSafe output
• PLL driven by a crystal oscillator that is phase aligned
• 100-MHz output from 10-MHz input
• Low-jitter, high-accuracy outputs
• 3.3V ± 5% operation
• 16-lead TSSOP
Logic Block Diagram
with external reference
in p u t re fe re n ce
(1 0 M H z )
IC L K
F A IL S A F E
IC L K d e te cte d
S A F E
C O N T R O L
TM
Global Communications Clock Generator
3901 North First Street
e xte rn a l p u lla b le c rysta l
X IN
C O N T R O L L E D
O S C IL L A T O R
(1 0 M H z )
C R Y S T A L
D IG IT A L
X O U T
Benefits
• Integrated high-performance PLL tailored for telecommuni-
• When reference is off, DCXO maintains clock outputs and
• DCXO maintains continuous operation should the input
• Glitch-free transition simplifies system design
• Works with commonly available, low-cost 10-MHz crystal
• Zero-ppm error for all output frequencies
• Compatible across industry standard design platforms
• Industry standard package with 6.4 × 5.0 mm
cations frequency synthesis eliminates the need for external
loop filter components
SAFE pin indicates FailSafe conditions
reference clock fail
a height profile of just 1.1 mm
L O C K E D
P H A S E
L O O P
FailSafe™ PacketClock™
San Jose
O U T P U T
D IV ID E R
,
CA 95134
Revised January 12, 2005
C L K A
1 0 0 M H z
CY26049-22
408-943-2600
2
footprint and

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CY26049-22 Summary of contents

Page 1

... cte d • 3901 North First Street CY26049-22 FailSafe™ PacketClock™ • ...

Page 2

... In the event of a reference clock failure the DCXO maintains the last frequency of the reference clock. The unique feature of the CY26049-22 is that the DCXO is, in fact, the primary clocking source. When the reference clock is restored, the DCXO automatically resynchronizes to the reference. The status of the reference clock input, as detected by the CY26049-22, is reported by the SAFE pin ...

Page 3

... Temp: 0° to 70°C) Test Conditions Input Clock Frequency, External Mode [1] Range of reference ICLK for Safe = High Duty Cycle defined in Figure 1, measured at 50 Period Jitter, Peak to Peak, 10,000 periods RMS Period Jitter CY26049-22 Comments Min. Typ. – 10 – 14 – ...

Page 4

... LOAD VDD 5 12 0.1uF 10MHz Package Type 16-lead TSSOP 16-lead TSSOP—Tape and Reel CY26049-22 Min. Typ. – – – – – 0 0.8 1.4 0.8 1.4 t4 VDD 0.1uF Operating Temperature Range Commercial 0° to 70°C Commercial 0° to 70°C Max ...

Page 5

... TSSOP 4.40 MM Body Z16.173 PIN 1 ID DIMENSIONS IN MM[INCHES] MIN. 1 REFERENCE JEDEC MO-153 6.25[0.246] 6.50[0.256] 4.30[0.169] 4.50[0.177] 16 0.25[0.010] 1.10[0.043] MAX. GAUGE PLANE 0.076[0.003] 0.05[0.002] SEATING 0.15[0.006] PLANE CY26049-22 MAX. PACKAGE WEIGHT 0.05gms BSC 0°-8° 0.50[0.020] 0.70[0.027] 51-85091-*A 0.09[[0.003] 0.20[0.008] Page ...

Page 6

... Document History Page Document Title: CY26049-22 FailSafe™ PacketClock™ Global Communications Clock Generator Document Number: 38-07730 REV. ECN No. Issue Date ** 308456 See ECN www.DataSheet4U.com Document #: 38-07730 Rev. ** Orig. of Change RGL New Data Sheet CY26049-22 Description of Change Page ...

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