CY26049-22 Cypress Semiconductor, CY26049-22 Datasheet - Page 3

• Manufacturer Part Number: CY26049-22
• Description: Global Communications Clock Generator
• Manufacturer: Cypress Semiconductor

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Document #: 38-07730 Rev. **
Absolute Maximum Conditions
Supply Voltage (V
DC Input Voltage...................................... –0.5V to V
Storage Temperature (Non-Condensing) .... –55°C to +125°C
Junction Temperature ................................ –40°C to +125°C
Recommended Pullable Crystal Specifications
Recommended Operating Conditions
DC Electrical Specifications
AC Electrical Specifications
F
C
R
R
DL
F
F
C
C
C
V
T
C
t
I
I
V
V
I
I
C
I
f
LR
DC = t
T
Note:
Parameter
Parameter
pu
OH
OL
IH
IL
DD
ICLK-E
1. Dependent on crystals chosen and crystal specs.
AC
Parameter
NOM
3SEPLI
3SEPLO
PJIT1
DD
IH
IL
LNOM
1
3
0
0
1
LOAD
IN
/R
/C
1
1
2
/t
Parameter
1
Frequency, Input Clock
FailSafe Lock Range
Output Duty Cycle
Clock Jitter
Nominal crystal frequency
Nominal load capacitance
Equivalent series resistance (ESR)
Ratio of third overtone mode ESR to
fundamental mode ESR
Crystal drive level
Third overtone separation from 3*F
Third overtone separation from 3*F
Crystal shunt capacitance
Ratio of shunt to motional capacitance
Crystal motional capacitance
Output High Current
Output Low Current
Input High Voltage
Input High Voltage
Input High Current
Input Low Current
Input Capacitance
Supply Current
DD
) ........................................–0.5 to +7.0V
Description
Description
Operating Voltage
Ambient Temperature (Commercial Temperature)
Max Output Load Capacitance
Power-up time for all V
voltage (power ramps must be monotonic)
Name
[1]
(Commercial Temp: 0°to 70°C)
(Commercial Temp: 0° to 70°C)
V
V
CMOS Levels
CMOS Levels
V
V
C
Input Clock Frequency, External Mode
Range of reference ICLK for Safe = High
Duty Cycle defined in Figure 1, measured at 50% of V
Period Jitter, Peak to Peak, 10,000 periods
RMS Period Jitter
OH
OL
IH
IL
LOAD
=0V
=V
= 0.5, V
= V
DD
NOM
NOM
= 15 pF, V
DD
Description
DD
DD
– 0.5, V
DD
Parallel resonance, fundamental mode,
AT cut
Fundamental mode
Ratio used because typical R
are much less than the maximum spec
No external series resistor assumed
High side
Low side
s to reach minimum specified
+ 0.5
Test Conditions
= 3.3V (sink)
DD
DD
Test Conditions
= 3.45V
= 3.3V (source)
Data Retention @ Tj = 125°C................................ >10 Years
Package Power Dissipation...................................... 350 mW
ESD (Human Body Model) MIL-STD-883.................... 2000V
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Comments
1
values
Min.
3.15
0.05
0
–
Min.
0.7
12
12
–
–
–
–
–
DD
Min.
14.4
400
180
–
–
–
–
3
–
–
–250
Typ.
Min.
Typ.
3.3
45
–
–
–
24
24
–
–
–
–
–
5
5
–
–
Typ.
0.5
10
14
18
CY26049-22
–
–
–
–
–
–
Typ.
10
50
–
–
–
Max.
Max.
3.45
500
0.3
70
15
10
10
45
Max.
–200
–
–
–
7
21.6
250
25
2
–
–
–
–
7
Max. Unit
+250 ppm
Page 3 of 6
250
50
55
–
Unit
Unit
MHz
ppm
V
V
Unit
ppm
mW
mA
mA
mA
ms
pF
µA
µA
°C
pF
pF
pF
fF
V
Ω
MHz
DD
DD
ps
ps
%