AN1827 Freescale Semiconductor / Motorola, AN1827 Datasheet - Page 9

• Manufacturer Part Number: AN1827
• Description: Programming and Erasing FLASH Memory on the MC68HC908AS60
• Manufacturer: Freescale Semiconductor / Motorola

Charge Pump
AN1827
MOTOROLA
BPR2 — Block Protect Register Bit 2
BPR1 — Block Protect Register Bit 1
BPR0 — Block Protect Register Bit 0
The internal charge pump is required for program, margin read, and
erase operations of the FLASH.
The charge pump is a dynamic circuit that uses a specific clocking
sequence of capacitors and switches to generate voltages higher in
magnitude than V
frequency range between 1.8 MHz and 2.5 MHz to operate the FLASH
correctly. The charge pump clock is derived from the bus clock. The
FDIV1 and FDIV0 bits in the FLASH control register are able to divide
the internal bus clock by 1, 2, or 4 to generate the charge pump clock.
These divide ratios allow enough tolerance for several commonly
available crystal frequencies.
See
frequency.
This bit protects the memory contents in the address range:
This bit protects the memory contents in the address range:
This bit protects the memory contents in the address range:
Freescale Semiconductor, Inc.
Table 1
For More Information On This Product,
1 = Address range protected from erase or program
0 = Address range open to erase or program
1 = Address range protected from erase or program
0 = Address range open to erase or program
1 = Address range protected from erase or program
0 = Address range open to erase or program
FLASH-1 $A000 to $FFFF or FLASH-2 $2000 to $7FFF.
FLASH-1 $9000 to $FFFF or FLASH-2 $1000 to $7FFF.
FLASH-1 $8000 to $FFFF or FLASH-2 $0450 to $7FFF.
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for common divide ratios based upon internal bus
DD
. This charge pump design requires a clock
Application Note
Charge Pump
9