DS26334 Dallas Semiconductor, DS26334 Datasheet - Page 38

• Manufacturer Part Number: DS26334
• Description: E1/T1/J1 Shortand Long-Haul Line Interface Unit
• Manufacturer: Dallas Semiconductor

DS26334 3.3V, 16-Channel, E1/T1/J1 Short/Long-Haul Line Interface Unit
5.9.4 Transmit Pattern Generation
Pattern generation generates the outgoing test pattern, and passes it onto error insertion. The transmit pattern
generator is a 32-bit shift register that shifts data from the least significant bit (LSB) or bit 1 to the most significant
n
y
bit (MSB) or bit 32. The input to bit 1 is the feedback. For a PRBS pattern (generating polynomial x
+ x
+ 1), the
feedback is an XOR of bit n and bit y. For a repetitive pattern (length n), the feedback is bit n. The values for n and
y are individually programmable (1 to 32). The output of the receive pattern generator is the feedback. If QRSS is
enabled, the feedback is an XOR of bits 17 and 20, and the output will be forced to one if the next 14 bits are all
zeros. QRSS is programmable (on or off). For PRBS and QRSS patterns, the feedback will be forced to one if bits
1 through 31 are all zeros. When a new pattern is loaded, the pattern generator is loaded with a seed/pattern value
n
before pattern generation starts. The seed/pattern value is programmable (0 – 2
– 1).
5.9.4.1
Transmit Error Insertion
Error insertion inserts errors into the outgoing pattern data stream. Errors are inserted one at a time or at a rate of
n
one out of every 10
bits. The value of n is programmable (1 to 7 or off). Single bit error insertion can be initiated
from the microprocessor interface, or by the manual error insertion input (TMEI). The method of single error
insertion is programmable (register or input). If pattern inversion is enabled, the data stream is inverted before the
overhead/stuff bits are inserted. Pattern inversion is programmable (on or off).
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