UPD77015GC NEC, UPD77015GC Datasheet - Page 11
![no-image](/images/manufacturer_photos/0/4/470/nec_sml.jpg)
UPD77015GC
Manufacturer Part Number
UPD77015GC
Description
16 bits/ Fixed-point Digital Signal Processor
Manufacturer
NEC
Datasheet
1.UPD77015GC.pdf
(60 pages)
- Current page: 11 of 60
- Download datasheet (425Kb)
Remark
X/Y
DA13 - DA0
D15 - D0
MRD
MWR
WAIT
HOLDRQ
BSTB
HOLDAK
• External data memory interface
Symbol
The state of the pins added 3S becomes high impedance when bus release signal (HOLDAK = 0) is output.
7
8, 9, 12 -19, 22 - 25
26 -29, 32 - 35, 38 - 41,
44 - 47
98
95
100
93
99
94
Pin No.
(3S)
(3S)
(3S)
(3S)
(3S)
I/O
I/O
O
O
O
O
O
O
I
I
Memory select signal output
• 0: X memory is used.
• 1: Y memory is used.
Address bus to external data memory
• External data memory is accessed.
• During the external memory is not accessed, these pins
16 bits data bus to external data memory
• External data memory is accessed.
Read output
• Reads external memory
Write output
• Writes external memory
Wait signal input
• Wait cycle is input when external memory is read.
Hold request signal input
• Input low level when external data memory bus is
Bus strobe signal output
• Outputs low level while the PD77017 is occupying
Hold acknowledge signal output
• Outputs low level when the PD77017 permits external
keep the previous level.
These pins are set to low level; 0000H, by reset.
They continue outputting low level until the first external
memory access.
1: No wait
0: Wait
expected to use.
external memory bus.
device to use external data memory bus.
PD77015, 77017, 77018
Function
11
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