UPD77015GC NEC, UPD77015GC Datasheet

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UPD77015GC

Manufacturer Part Number
UPD77015GC
Description
16 bits/ Fixed-point Digital Signal Processor
Manufacturer
NEC
Datasheet
Document No. U10902EJ3V0DS00 (3rd edition)
Date Published June 1997 N
Printed in Japan
processing with its demand for high speed and precision.
FEATURES
In this document, all descriptions of the PD77017 also apply to the PD77015 and PD77018, unless
otherwise specified.
• Instruction memory area : 64K words
• Data memory areas : 64K words
FUNCTIONS
• Instruction cycle: 30 ns (MIN.)
• On-chip PLL to provide higher operation clock than the external clock
• Dual load/store
• Hardware loop function
• Conditional execution
• Executes product-sum operation in one instruction cycle
PROGRAMMING
• 16 bits
• 8 general registers (40 bits each)
• 8 ROM/RAM data pointer: each data memory area has 4 registers
• 10 source interrupts (external: 4, internal: 6)
• 3 operand instructions (example: R0 = R0 +R1L R2L)
• Nonpipeline on execution stage
MEMORY AREAS
CLOCK GENERATOR
• Mask option for CLKOUT pin:
• Selectable source clock: external clock input and crystal resonator
frequency multiple as "1").
[External clock]
[Crystal resonator]
PD77015, 77017, 77018 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal
Fixed to the low level.
Does not output the internal system clock.
On-chip PLL to provide higher operation clock (33 MHz MAX.) than the external clock.
Variable multiple rates (1, 2, 4, 8) by mask option.
Oscillation frequency corresponds directly to the system clock frequency (Sure to specify the mask option
Operation clock: 33 MHz
External clock: 33, 16.5, 8.25, 4.125 MHz
Crystal: 33 MHz
16 bits + 40 bits
16 bits, Fixed-point Digital Signal Processor
The information in this document is subject to change without notice.
PD77015,77017,77018
40 bits multiply accumulator
The mark
16 bits
DATA SHEET
32 bits
2 (X memory, Y memory)
shows major revised points.
MOS INTEGRATED CIRCUIT
©
1993, 1994

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UPD77015GC Summary of contents

Page 1

Fixed-point Digital Signal Processor PD77015, 77017, 77018 are 16 bits fixed-point DSPs (Digital Signal Processors) developed for digital signal processing with its demand for high speed and precision. FEATURES • FUNCTIONS • Instruction cycle (MIN.) Operation ...

Page 2

ON-CHIP PERIPHERAL • I/O port: 4 bits • Serial I/O (16 bits): 2 channels • Host I/O (8 bits): 1 channel • CMOS • single power supply ORDERING INFORMATION Part Number PD77015GC- -9EU 100-pin plastic TQFP (FINE ...

Page 3

External Memory X Memory Serial Data I/O #1 Pointers Serial I/O #2 Ports Interrupt Control Host I/O Wait Controller INT1 – INT4 IE I/O X–Bus Y–Bus X Memory Y Memory Y Memory Data Pointers Main Bus Loop Instruction Control PC ...

Page 4

FUNCTIONAL PIN GROUPS SO1 SORQ1 SOEN1 SCK1 Serial Interface #1 SI1 SIEN1 SIAK1 SO2 SOEN2 SCK2 Serial Interface #2 SI2 SIEN2 Ports (4) HCS HA0, HA1 (2) HRD HRE Host Interface HWR HWE HD0 - HD7 (8) ...

Page 5

... MHz) 33/16.5/8.25/4.125 MHz Variable multiple rate ( mask option. 33 MHz STOP instruction is added. Channel 1 has the same functions as that of the PD77016. Channel 2 has no SORQ2 or SIAK2 pin (Channel 2 is used for CODEC connection 100-pin plastic TQFP PD77018A PD77019 4K words ...

Page 6

PIN CONFIGURATION 100-pin plastic TQFP (FINE PITCH) (14 100 RESET 1 INT4 2 INT3 3 INT2 ...

Page 7

... SOEN1,SOEN2: Serial Output Enable SORQ1: Serial Output Request TCK: Test Clock Input TDI: Test Data Input TDO: Test Data Output TICE: Test In-Circuit Emulator TMS: Test Mode Select V : Power Supply DD WAIT: Wait Input X1: Clock input/crystal connection X2: Crystal connection X/Y: X/Y Memory Select PD77015, 77017, 77018 7 ...

Page 8

... DA5 DA4 GND DA3 DA2 48 SI1 24 DA1 49 SIEN1 25 DA0 50 SCK1 Note I.C. (Internally Connected): Leave this pin open. 8 Symbol Pin No. Symbol 51 SIAK1 52 SO1 53 SORQ1 54 SOEN1 55 GND SOEN2 58 SO2 59 SCK2 60 SIEN2 61 SI2 ...

Page 9

... PIN FUNCTIONS ............................................................................................................................... 10 1.1 Pin Functions ........................................................................................................................................... 10 1.2 Recommended Connection for Unused Pins ....................................................................................... 15 2. FUNCTIONS ...................................................................................................................................... 16 2.1 Pipeline Processing ................................................................................................................................ 16 2.1.1 Outline ........................................................................................................................................... 16 2.1.2 Instructions with Delay .................................................................................................................. 16 2.2 Program Control Unit .............................................................................................................................. 17 2.3 Operation Unit ......................................................................................................................................... 17 2.3.1 General register (R0 to R7) ........................................................................................................... 17 2.3.2 MAC: Multiply ACcumulator ......................................................................................................... 18 2.3.3 ALU: Arithmetic Logic Unit ........................................................................................................... 18 2.3.4 BSFT: Barrel ShiFTer ................................................................................................................... 18 2.3.5 SAC: Shifter And Count Circuit .................................................................................................... 18 2 ...

Page 10

... Ground I/O Function I Clock input / crystal connection pin • The clock signal is connected to X1, when using external clock for system clock. _ Crystal connection pin • X2 should be left open when using external clock for system clock. O Internal system clock output ...

Page 11

External data memory interface Symbol Pin No. X/Y 7 DA13 - DA0 -19 D15 - D0 26 - MRD 98 MWR 95 WAIT 100 ...

Page 12

Serial interface Symbol Pin No. SCK1 50 SORQ1 53 SOEN1 54 SO1 52 SIEN1 49 SI1 48 SCK2 59 SOEN2 57 SO2 58 SIEN2 60 SI2 61 SIAK1 51 Remark The state of the pins added 3S becomes high ...

Page 13

Host interface Symbol Pin No. HA1 82 HA0 81 HCS 78 HRD 79 HWR 80 HRE 66 HWE 67 HD7 - HD0 Remark The state of the pins added 3S becomes high impedance when the host ...

Page 14

... Pin No. I. PD77015, 77017, 77018 I/O Function O For debugging O For debugging I For debugging I For debugging I For debugging I/O Function _ Internal connected pin. Leave this pin open. Caution When any signal is applied to or read out from this pin, normal operation of the PD77017 is not assured. ...

Page 15

... Recommended Connection for Unused Pins Pin INT1 - INT4 X/Y DA0 - DA13 Note1 D0 - D15 MRD MWR WAIT HOLDRQ BSTB HOLDAK SCK1, SCK2 SI1, SI2 SOEN1, SOEN2 SIEN1, SIEN2 SORQ1 SO1, SO2 SIAK1 HA0, HA1 HCS HRD HWR HRE HWE Note2 HD0 - HD7 ...

Page 16

FUNCTIONS 2.1 Pipeline Processing This section describes the PD77017 pipeline processing. 2.1.1 Outline The PD77017 basic operations are executed in following 3-stage pipeline. (1) instruction fetch; if (2) Instruction decoding; id (3) execution; ex When the PD77017 operates a ...

Page 17

Program Control Unit Program control unit controls not only count up of program counter in normal operation, but loop, repeat, branch, halt and interrupt. In addition to loop stack of loop 4 level and program stack of 15 level, ...

Page 18

General register used as 32 bits register Bit 31 to bit 0 of general register are treated as 32 bits register, when it is used for a operand of exponent instruction. (3) General register used as 24 bits register ...

Page 19

CJC: Condition Judge Circuit CJC judges whether condition is true or false with 40 bits input data. A conditional instruction is executed when the result is true, and not executed when the result is false. 2.4 Memory The PD77017 ...

Page 20

Instruction RAM Outline The PD77015 has an instruction ROM (4K words The PD77017 has an instruction ROM (12K words The PD77018 has an instruction ROM (24K words A system vector area is assigned to 64 words of the instruction ...

Page 21

Data Memory Outline The PD77015 has two data memory areas (64K words Each memory areas consists of 1K words PD77017 has interface with the external data memory words be add to X/Y memories. The PD77017 has two ...

Page 22

Data Memory Addressing There are following two types of data memory addressing. • Direct addressing The address is specified in the instruction field. • Indirect addressing The address is specified by the data pointer (DP). DP can get a ...

Page 23

INSTRUCTIONS 3.1 Outline All PD77017 instructions are one-word instructions, consisting of 32 bits. And they are executed (min.) per instruction. There are following 9 instruction types. (1) Trinomial instructions : specify the Acc operation ...

Page 24

Instruction Set and Operation An operation is written according to the rules for expressing. An expression of instructions having two or more descriptions can have only one selected. (a) Expressions and selectable registers Expression and selectable registers are shown ...

Page 25

Modifying data pointers Data pointers are modified after memory access. The results are valid immediately after instruction execution impossible to modify without memory access. Description DPn No operation: DPn value does not change. DPn++ DPn DPn+1 DPn– ...

Page 26

PD77017 INSTRUCTION SET Name Mnemonic Multiply add rh' Multiply sub ro = ro–rh rh' Sign unsign Multiply add (rl should be a plus integral number.) Trinomial Unsign unsign ro=ro+rl ...

Page 27

Name Mnemonic And ro" & ro' Immediate and ro & imm Or ro" ro' Immediate or ro imm Dyadic Exclusive or ro" ro' Immediate exclusive or ro ...

Page 28

Name Mnemonic Cumulation ro Degression ro'– Division ro Monadic Parallel load/store ro= dpx_mod ro'= dpy_mod Note 1, Note 2 ro= dpx_mod dpy_mod=rh dpx_mod=rh ro= dpy_mod dpx_mod=rh dpy_mod=rh' Load/store Section load/store dest= dpx_mod dest'= dpy_mod ...

Page 29

Name Mnemonic Direct addressing dest = addr load/store Note 1 addr = source Load/store Immediate index dest = dp_imm load/store Note 2 dp_imm = source Inter-register transfer dest = rl Inter-register Note 3 transfer rl = source Immediate data set ...

Page 30

Name Mnemonic Jump JMP imm Inter-register indirect jump JMP dp Subroutine call CALL imm Inter-register indirect CALL dp Branch subroutine call Return RET Return from interrupt RETI Repeat REP count Loop LOOP count Hardware (Mnemonics more than two lines) loop ...

Page 31

Note 1. The HALT instruction causes all function except for clock and PLL to halt. The system is placed in much less power consumption mode. The contents of internal registers and memories are maintained. HALT is released by interrupt input. ...

Page 32

ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = +25 ˚C) A Parameters Power supply voltage Input voltage Output voltage Storage temperature Operating ambient temperature Caution Exposure to Absolute Maximum Ratings for extended periods may affect device reliability; exceeding the ratings ...

Page 33

DC Characteristics (T = –40 to +85 ˚ Parameters Symbol High level input voltage V IH High level X1 input voltage V IHC Low level input voltage V IL High level output voltage V OH Low level output ...

Page 34

AC Characteristics (T = –40 to +85 ˚ Clock Required Timing Condition Parameters Symbol CLKIN cycle time t cCX CLKIN high level width t wCXH CLKIN low level width t wCXL CLKIN rise/fall time t rfCX Note 0.5t ...

Page 35

... Always keep the ground point of the capacitor of the oscillator circuit at the same potential as GND. • Do not connect the power source pattern through which a high current flows. • Do not extract signals from the oscillator. 2. When using ceramic resonator or crystal resonator, frequency multiple rate should be specified mask option ...

Page 36

Recommended Oscillator Circuit Constants Manufacturer Name Ceramic Resonator TDK MURATA Manufacturing Crystal Resonator DAISHINKU Remark Recommended oscillator circuit constants may differ on the wiring capacitance of the target board the customer designed. When using a resonator for the target system, ...

Page 37

Clock Input/Output Timing t wCXH X1 Internal clock t wCO CLKOUT Reset Timing t w(RL) RESET Interrupt Timing INT1 - INT4 PD77015, 77017, 77018 t cCX t wCXL cCO t wCO t rec(R) t w(INTL ...

Page 38

External Data Memory Access Required Timing Condition Parameters Read data setup time Read data hold time WAIT setup time WAIT hold time Switching Characteristics Parameters Address output delay time Address output hold time MRD output delay time MRD hold time ...

Page 39

External Data Memory Access Timing (Write) CLKOUT t dDA DA0 - DA13, X/Y t vDDWD Hi D15 t dDW MWR t suWA WAIT t hDA t vDDWD t suDW t t wDWL wDWH hWA suWA ...

Page 40

Bus Arbitration Required Timing Condition Parameters HOLDRQ setup time HOLDRQ hold time Switching Characteristics Parameters BSTB hold time BSTB output delay time HOLDAK output delay time Data hold time when bus arbitration Data valid time after bus arbitration 40 Symbol ...

Page 41

Bus Arbitration Timing (Bus idle) CLKOUT (Bus busy) t hBS BSTB t suHRQ HOLDRQ HOLDAK X/Y, DA0 - DA13, MRD, MWR Bus idle Bus release t dBS t hHRQ t dHAK t h(BS-D) Bus idle (Bus busy suHRQ ...

Page 42

Bus Arbitration Timing (Bus busy) CLKOUT (Bus busy) BSTB t suHRQ HOLDRQ HOLDAK X/Y, DA0 - DA13, MRD, MWR Bus busy Bus idle Bus release t t hBS dBS t hHRQ t dHAK t h(BS-D) Bus idle (Bus busy) t ...

Page 43

Serial Interface Required Timing Condition Parameters SCK input cycle time SCK input high/low level width SCK input rise/fall time SOEN recovery time SOEN hold time SIEN recovery time SIEN hold time SI setup time SI hold time Switching Characteristics Parameters ...

Page 44

Serial Output Timing 1 t cSC t t wSC wSC SCK1, SCK2 t dSOR SORQ1 t recSOE t hSOE SOEN1, SOEN2 SO1, Hi-Z SO2 t hSOR t recSOE t hSOE t t vSO vSO 1st t t rfSC rfSC t ...

Page 45

Serial Output Timing 2 (Continual output) t cSC t t wSC wSC SCK1, SCK2 t dSOR SORQ1 SOEN1, SOEN2 SO1, SO2 t hSOR t recSOE t hSOE t vSO Last 1st t t rfSC rfSC t hSO Hi-Z Last ...

Page 46

Serial Input Timing 1 t cSC t t wSC wSC SCK1, SCK2 t dSIA SIAK1 t recSIE t hSIE SIEN1, SIEN2 SI1, SI2 t hSIA t recSIE t hSIE t t suSI hSI 1st t t rfSC rfSC 3rd 2nd ...

Page 47

Serial Input Timing 2 (Continual input) t cSC t t wSC wSC SCK1, SCK2 t dSIA SIAK1 SIEN1, SIEN2 SI1, Last–1 SI2 t hSIA t recSIE t hSIE t t suSI hSI Last 1st t t rfSC rfSC 2nd 3rd ...

Page 48

Host Interface Required Timing Condition Parameters HRD delay time HRD width HCS, HA0, HA1 read hold time HCS, HA0, HA1 write hold time HRD, HWR recovery time HWR delay time HWR width HWR hold time HWR setup time Switching Characteristics ...

Page 49

Host Interface Timing (Read) CLKOUT HCS, HA0, HA1 t dHR HRD Hi-Z HD0 - HD7 t dHE HRE t hHCAR t t wHR recHS t hHDR t vHDR Hi-Z t hHE ...

Page 50

Host Interface Timing (Write) CLKOUT HCS, HA0, HA1 t dHW HWR HD0 - HD7 t dHE HWE t hHCAW t t wHW recHS t hHDW t suHDW t hHE ...

Page 51

General Input/Output Ports Required Timing Condition Parameters Port input setup time Port input hold time Switching Characteristics Parameters Port output delay time General Input/Output Ports Timing CLKOUT (Output (Input) PD77015, 77017, 77018 Symbol Conditions ...

Page 52

Debugging Interface (JTAG) Required Timing Condition Parameters TCK cycle time TCK high/low level width TCK rise/fall time TMS, TDI setup time TMS, TDI hold time Input pin setup time Input pin hold time Switching Characteristics Parameters TDO output delay time ...

Page 53

PACKAGE DRAWING 100 PIN PLASTIC TQFP (FINE PITCH 100 NOTE Each lead centerline is located within 0.10 mm (0.004 inch) of its true position (T.P.) at maximum material condition. PD77015, 77017, 77018 14) ...

Page 54

RECOMMENDED SOLDERING CONDITIONS When soldering these products highly recommended to observe the conditions as shown below. If other soldering processes are used the soldering is performed under different conditions, please make sure to consult with ...

Page 55

PD77017GC- -9EU: 100-pin plastic TQFP (FINE PITCH) (14mm PD77018GC- -9EU: 100-pin plastic TQFP (FINE PITCH) (14mm Process I nfrared ray reflow Peak temperature: 235 ˚C or below (Package surface temperature), Reflow time: 30 seconds or less (at 210 ˚C or ...

Page 56

PD77015, 77017, 77018 ...

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PD77015, 77017, 77018 57 ...

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PD77015, 77017, 77018 ...

Page 59

... Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction connection is provided to the input pins possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices ...

Page 60

... The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited without governmental license, the need for which must be judged by the customer. The export or re-export of this product from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales representative. ...

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