UPD75518 NEC, UPD75518 Datasheet - Page 125

• Manufacturer Part Number: UPD75518
• Description: 4 BIT SINGLE-CHIP MICROCOMPUTER
• Manufacturer: NEC

5. INTERRUPT FUNCTION
(a) Vectored interrupt function under hardware control which can determine whether to accept an interrupt
(b) Any interrupt start address can be set.
(c) Multiple interrupt function which can specify the priority by the interrupt priority specification register
(d) Test function of an interrupt request flag (IRQ
(e) Release of the standby mode (Interrupts released by an interrupt enable flag can be selected.)
5.1 CONFIGURATION OF THE INTERRUPT CONTROL CIRCUIT
is mapped in the data memory space.
INTBT
INT4
INT0
INT1
INTCSI0
INTT0
INTTPG
INT2
INTW
The PD75518(A) has nine interrupt sources and can handle multiple interrupts with a priority.
The PD75518(A) is also provided with two features for accepting testable interrupts.
Notes 1. The priority is used when two or more interrupt requests are issued at a time.
The following functions are provided for the interrupt control circuit of the PD75518(A).
The interrupt control circuit of the PD75518(A) is configured as shown in Fig. 5-1. Each hardware item
by an interrupt enable flag (IE
(IPS)
(The software can confirm that an interrupt occurred.)
2. See (3) in Section 5.2 for details on INT2.
(Reference time interval signal from basic
interval timer)
(Detection of both rising and falling edges)
(Rising/falling edge detection specification)
(Serial data transfer completion signal)
(Match signal between programmable timer/
counter count register and modulo register)
(Match signal from timer/pulse generator)
(Rising edge detection for an INT2 pin input
signal, or falling edge detection for either of
KR0 to KR7 pin input signals)
(Signal from clock timer)
Interrupt source
Note 2
) and the interrupt master enable flag (IME)
Table 5-1 Interrupt Sources
)
External
External
External
External
Internal/
Internal
Internal
Internal
Internal
Internal
external
Testable input signal (Sets IRQ2 and IRQW.)
Priority
1
2
3
4
5
6
Note 1
Vectored interrupt
request signal (vector
table address)
VRQ5 (000AH)
VRQ6 (000CH)
PD75518(A)
VRQ1 (0002H)
VRQ2 (0004H)
VRQ3 (0006H)
VRQ4 (0008H)
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