LM3S101 Luminary Micro, Inc., LM3S101 Datasheet - Page 223
![no-image](/images/no-image-200.jpg)
LM3S101
Manufacturer Part Number
LM3S101
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S101.pdf
(300 pages)
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- Current page: 223 of 300
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October 5, 2006
Reset
Reset
Type
Type
Bit/Field
31:8
UART Primecell Identification 1 (UARTPCellID1)
Offset 0xFF4
7:0
RO
RO
31
15
0
0
Register 22: UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4
The UARTPCellIDn registers are hard-coded and the fields within the registers determine the
reset values.
RO
RO
30
14
0
0
reserved
Name
CID1
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
RO
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0xF0
0
RO
RO
25
0
9
0
Preliminary
Description
Reserved bits return an indeterminate value, and should never
be changed.
UART PrimeCell ID Register[15:8]
Provides software a standard cross-peripheral identification
system.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
1
RO
RO
22
0
6
1
RO
RO
21
0
5
1
RO
RO
20
0
4
1
CID1
RO
RO
19
0
3
0
LM3S101 Data Sheet
RO
RO
18
0
2
0
RO
RO
17
0
1
0
RO
RO
16
0
0
0
223
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