UPD16434 NEC, UPD16434 Datasheet - Page 28

• Manufacturer Part Number: UPD16434
• Description: 1/8/ 1/16 DUTY LCD CONTROLLER/DRIVER
• Manufacturer: NEC

(1) Parallel interface mode (refer to Figure 3–5 and Figure 3–6)
(2) Serial interface mode (refer to Figure 3–3 and Figure 3–4)
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4.2 Chip Address Selection Function
each
serial or parallel data format. Only the chip whose address coincides with the chip address information is seleceted
(enables command/data input/output).
function is provided, when D2(CAE) = 1 (at reset release), is specified.
information (0 to 3) for the
executing an output or input instruction for port 4 to port 7 of the
first falling edge of the /STB becomes the 2-bit chip address information.
and 8th /SCK (corresponds to CA0), that is the lower 2 bits of the first 8-bit serial data, becomes the chip
address information.
Remarks 1. When a RESET is input, the chip address comparison data (data compared with CA1 and CA0) in the
In a multi-chip system configuration, the chip address selection function compares the chip address assigned to
Thus, the CPU need not send two or more chip select signals (/CS).
This function is unconditionally provided in the parallel interface mode. However, in the serial interface mode, this
The parallel interface is equivalent to that for the
PD16434 using the
After the falling edge of the /CS, the data read into D1 (corresponds to CA1) and D0 (corresponds to CA0) at the
After the falling edge of the /CS, the data read in to SI at the rising edge of the 7th /SCK (corresponds to CA1)
PD16434 (by CA0, CA1 inputs) in advance and the chip address information (2 bits) sent from the CPU in the
2. The following points must be noted for a multi-chip configuration system using the parallel interface;
immediately after the RESET input is released, a chip whose CA1 and CA0 are set to "00" sets the
/BUSY to high, informing the CPU that the chip can be accessed.
If no chip address is sent, a chip whose CA1 and CA0 are "00" will be accessed.
when transferring the process from chip A, which has already been in the read mode to chip B, and
again selecting chip A after that, the data pointer must be set by the data pointer load command
reading data.
PD16434 is cleared to "00". Therefore, in multi-chip configuration, if the /CS is set to low
PD82C43 interface function.
PD16434 can be obtained on the D1 and D0 lines at the falling edge of the /STB by
Data Sheet S10299EJ4V0DS00
PD82C43 I/O expander. Therefore, the chip address
PD82C43, when the
PD50H is connected to the
PD16434