UPD161622 NEC, UPD161622 Datasheet - Page 14

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UPD161622

Manufacturer Part Number
UPD161622
Description
396 OUTPUT TFT-LCD SOURCE DRIVER
Manufacturer
NEC
Datasheet
www.DataSheet4U.com
5. DESCRIPTION OF FUNCTIONS
5.1 CPU Interface
5.1.1 Selection of interface type
to D
table 5–1 below.
Notes 1. Hi-Z: High impedance
5.1.2 Parallel interface
connection to an i80 series or M68 series CPU (see table 5–2 below).
in the following table 5–3.
14
When the parallel interface has been selected (PSX = H), setting the C86 pin as either H or L enables a direct
The data bus signal is identified according to the combination of the RS, /RD (E), and /WR (R, /W) signals, as shown
The
PSX
H
H
L
0
) or a serial data input (SI). Setting the polarity of the PSX pin as either H or L enables the selections shown in
2. X: Don’t care (1 or 0)
3. In serial mode, read function is not available.
PD161622 chip transfers data using a 16-bit bi-directional data bus (D
X
BMD
Note2
0
1
Common
RS
H
H
L
L
16-bit parallel
8-bit parallel
Serial
Mode
Note3
M68 series CPU
C86
H
L
/CS
/CS
/CS
/CS
R, /W
H
H
L
L
RS
RS
RS
RS
M68 series CPU
i80 series CPU
Data Sheet S15649EJ2V0DS
Mode
/RD
/RD (E)
/RD (E)
/RD (E)
H
H
Note2
i80 series CPU
L
L
Table 5–1.
Table 5–2.
Table 5–3.
/WR (R,/W)
/WR (R,/W)
/WR (R,/W)
/WR
H
H
Note2
L
L
/RD (E)
/RD
E
Read display data and registers
Write display data and registers
Prohibited
Write to control index register
Note2
C86
C86
C86
15
to D
/WR (R,/W)
0
R, /W
), 8-bit bi-directional data bus (D
D
D
/WR
Hi-Z
Hi-Z
15
15
Function
to D
to D
Note1
Note1
8
8
D
D
D
SI
7
7
7
PD161622
SCL
D
D
D
6
6
6
D
D
D
Hi-Z
5
5
5
to D
to D
to D
Note1
0
0
0
7

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