DSP56300 Motorola Inc, DSP56300 Datasheet - Page 4

• Manufacturer Part Number: DSP56300
• Description: DSP56301 Digital Signal Processor
• Manufacturer: Motorola Inc

Errata
Number
ED9
ED10
ED12
DSP56301 Errata
 1996-2002, Motorola
Document Update
Description (added 1/27/98):
When the SCI is configured in Synchronous mode, internal clock, and all
the SCI pins are enabled simultaneously, an extra pulse of 1 DSP clock
length is provided on the SCLK pin.
Workaround:
a. Enable an SCI pin other than SCLK.
b. In the next instruction, enable the remaining SCI pins, including the
Pertains to: UM, SCI Chapter (Use the 302 UM as your reference,
Section 8.4.2, “SCI Initialization”)
Description (added 5/13/98):
The HI32 may operate improperly in PCI mode when the TWSD bit
is set in the HCTR register.
Workaround:
Do not set the TWSD bit in the HCTR register; this bit is reserved.
This is a documentation change.
Description (added 5/13/98):
When the HI32 is in PCI mode, the HTF control bits affect the
address insertion (the IAE bit is set in the DPCR register) in the
same way they affect the transferred data.
Address as appears on the PCI bus: $12345678
HTF[1:0]
00
01
10
11
Workaround:
This is a documentation update.
SCLK pin.
Freescale Semiconductor, Inc.
DSP56301 Digital Signal Processor
For More Information On This Product,
301CE2K30A_0_8
Go to: www.freescale.com
Mask:2K30A
Chip Errata
Inserted Address
$005678,
$345678
$345678
$123456
$001234
ng 12/19/02 pg. 4
Applies
to Mask
2K30A
2K30A
2K30A