83C576 Philips Semiconductors, 83C576 Datasheet

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83C576

Manufacturer Part Number
83C576
Description
80C51 8-bit microcontroller family 8K/256 OTP/ROM/ 6 channel 10-bit A/D/ 4 comparators/ failure detect circuitry/ watchdog timer
Manufacturer
Philips Semiconductors
Datasheet
Product specification
Supersedes data of 1998 Jan 06
IC20 Data Handbook
83C576/87C576
80C51 8-bit microcontroller family
8K/256 OTP/ROM, 6 channel 10-bit A/D,
4 comparators, failure detect circuitry, watchdog timer
INTEGRATED CIRCUITS
1998 Jun 04

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83C576 Summary of contents

Page 1

... OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer Product specification Supersedes data of 1998 Jan 06 IC20 Data Handbook INTEGRATED CIRCUITS 1998 Jun 04 ...

Page 2

... Programmable I/O pins Serial on-board programming Schmitt trigger inputs on Port 1 DESCRIPTION The Philips 83C576/87C576 is a high-performance microcontroller fabricated with Philips high-density CMOS technology. The Philips CMOS technology combines the high speed and density characteristics of HMOS with the low power attributes of CMOS. Philips epitaxial substrate minimizes latch-up sensitivity. ...

Page 3

... POINTER TMP1 TMP2 ALU SFRs PSW TIMERS PCA PORT 1 PORT 3 LATCH 10-BIT ANALOG TO DIGITAL CONVERTER PORT 1 PORT 3 DRIVERS DRIVERS +AV CC P3.0-P3.7 P1.0-P1.5 – Product specification 83C576/87C576 ROM/ EPROM PROGRAM ADDRESS REGISTER BUFFER PC INCRE- MENTER PROGRAM COUNTER DPTR LATCH PWM COMPARATOR BLOCK SU00255B ...

Page 4

... CC 12 NC* 41 –V /AV REF SS 13 TxD/P3.1 42 ADIN0/P1.0 14 INT0/P3.2/CMP3+ 43 ADIN1/P1.1 15 INT1/P3.3/CMP2+ 44 ADIN2/P1 INTERNAL CONNECTION SU00253B 4 Product specification 83C576/87C576 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 ADIN0 ADIN1 ADIN2 ADIN3 ADIN4 ADIN5 PWM1/ECI CEX4/PWM0 T2/CS# T2EX/A0 CEX3/CMP3 CEX2/CMP2 CEX1/CMP1 CEX0/CMP0 SU00254A ...

Page 5

... PCA module 3 external I/O CMP3 comparator 3 output P2.4 T2EX timer 2 capture input A0 UPI address input P2.5 T2 timer 2 external I/O — clock-out (programmable) CS UPI chip select input P2.6 CEX4 PCA module 4 external I/O PWM0 Pulse width modulator 0 output P2.7 ECI PCA count input PWM1 Pulse width modulator 1 output 5 Product specification 83C576/87C576 ...

Page 6

... EPROM programming. If this pin voltage during reset the device enters the in-circuit programming mode. Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. Crystal 2: Output from the inverting oscillator amplifier applicable Product specification 83C576/87C576 ...

Page 7

... EC0DP C3RO EC3TDC EC2TDC EC1TDC EC0TDC EC3O ET2 ES ET1 EOB EIB EAD EC4 EC3 7 Product specification 83C576/87C576 RESET LSB VALUE 00H 00H 00H 00H 00H 00H 00H 00H 00H 00H 00H 00H 00H ASCA2 ASCA1 ASCA0 00H ...

Page 8

... TF1 TR1 TF0 TR0 IE1 TF2 EXF2 RCLK TCLK EXEN2 – – – – – 8 Product specification 83C576/87C576 RESET LSB VALUE PX1 PT0 PX0 x0000000B PC2 PC1 PC0 00H AD2 AD1 AD0 FFH ADIN2 ...

Page 9

... The 8XC576 can be reset in software by setting the RST bit of the AUXR register (AUXR.3). See Figure 1 for reset diagram. 9 Product specification 83C576/87C576 RESET LSB VALUE 00H 00H 00H ...

Page 10

... ECF bit in the CMOD register is set, The CF bit can only be cleared by software. Bits 0 through 4 of the CCON register are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and are set by hardware when either a match or a capture occurs. These flags 10 Product specification 83C576/87C576 AUXR LO AO (8EH) PCON ...

Page 11

... EC, is enabled. In this case, a module event will generate an interrupt for both the module source and the single source, EC. 16 BITS MODULE 0 MODULE 1 MODULE 2 MODULE 3 MODULE 4 Figure 2. Programmable Counter Array (PCA) 11 Product specification 83C576/87C576 P2.0/CEX0 P2.1/CEX1 P2.2/CEX2 P2.3/CEX3 P2.6/CEX4 SU00578 ...

Page 12

... CF CR –– CCF4 CCF3 Figure 3. PCA Timer/Counter CF CR –– CCF4 CCF3 CCAPMn.0 ECCFn Figure 4. PCA Interrupt System 12 Product specification 83C576/87C576 TO PCA MODULES OVERFLOW INTERRUPT CL CMOD CPS1 CPS0 ECF (D9H) CCON CCF2 CCF1 CCF0 (D8H) SU00516 CCON CCF2 ...

Page 13

... External clock at ECI/P2.7 pin (max. rate = f Figure 5. CMOD: PCA Counter Mode Register – CCF4 CCF3 CCF2 Figure 6. CCON: PCA Counter Control Register 13 Product specification 83C576/87C576 Reset Value = 00XX X000B CPS0 ECF OSC SU00686A Reset Value = 00X0 0000B CCF1 CCF0 1 ...

Page 14

... CEXn 16-bit capture by a transition on CEXn 16-bit Software Timer 16-bit High Speed Output 8-bit PWM Watchdog Timer 14 Product specification 83C576/87C576 Reset Value = X000 0000B PWMn ECCFn 1 0 SU00037 MODULE FUNCTION ...

Page 15

... CCF4 CCF3 CCF2 CCAPnL (TO CCFn) MATCH CL ECOMn CAPPn CAPNn MATn TOGn Figure 10. PCA Compare Mode 15 Product specification 83C576/87C576 CCON CCF0 (D8H) PCA INTERRUPT PCA TIMER/COUNTER CH CL CCAPnH CCAPnL CCAPMn ECCFn (DAH – DEH) SU00749 CCON CCF1 CCF0 (D8H) ...

Page 16

... ENABLE 8–BIT COMPARATOR CL >= CCAPnL CL OVERFLOW PCA TIMER/COUNTER CAPPn CAPNn MATn TOGn PWMn Figure 12. PCA PWM Mode 16 Product specification 83C576/87C576 CCON CCF1 CCF0 (D8H) PCA INTERRUPT TOGGLE CEXn CCAPMn, n: 0..4 PWMn ECCFn (DAH – DEH SU00751 0 CEXn 1 CCAPMn, n: 0..4 ECCFn (DAH – ...

Page 17

... Figure 15). Whether the watchdog is in the watchdog or timer mode, when external RESET is applied, the following takes place: 1998 Jun 04 83C576/87C576 Watchdog mode bit set to watchdog mode. Watchdog is running. Autoload register set to 00 (min. count). Watchdog time-out flag is unchanged. ...

Page 18

... Given or Broadcast address. Mode 0 is the Shift Register mode and SM2 is ignored. 18 Product specification 83C576/87C576 Prescaler Select 2, reset to 1 Prescaler Select 1, reset to 1 Prescaler Select 0, reset to 1 Low Voltage Reset Enable, reset to 1 (enabled) ...

Page 19

... RESET CCAP4H WRITE TO CCAP4L 0 1 ENABLE WATCHDOG FEED SEQUENCE MOV WFEED1,#0A5H MOV WFEED2,#5AH OSC/2 PRE2 Figure 15. Watchdog Timer in 87C576 and 80C576 / 83C576 ( 1998 Jun 04 TXI D Q P3.1 LATCH PROGRAMMABLE OUTPUT BUFFER CIDL WDTE –– –– –– ...

Page 20

... WATCHDOG FEED SEQUENCE MOV WFEED1,#0A5H MOV WFEED2,#5AH OSC/2 PRE2 Figure 16. Watchdog Timer of 83C576 in Watchdog Mode ( WDMOD = 1) WATCHDOG FEED SEQUENCE MOV WFEED1,#0A5H MOV WFEED2,#5AH OSC/2 PRE2 Figure 17. Watchdog Timer of 83C576 in Timer Mode ( WDMOD = 0) 1998 Jun 04 8– ...

Page 21

... Baud Rate** shift register f /12 OSC 8-bit UART variable 9-bit UART f / /32 OSC OSC 9-bit UART variable Figure 19. SCON: Serial Port Control Register 21 Product specification 83C576/87C576 2 2 4096 8192 TO WATCHDOG DOWN COUNTER SU00660 Reset Value = 0000 0000B SU00766 ...

Page 22

... CMP0- on port 2. The CMP register contains an output and enable bit for each comparator. Figure 22 shows the connection of the comparators. When the comparator is enabled, the port should be configured by the user as high impedance. 22 Product specification 83C576/87C576 D7 D8 ONLY IN STOP MODE 2, 3 BIT ...

Page 23

... AO: Turns off ALE output. LO: Reduces drive of internal clock circuitry. 8XC576 spec’d to 12MHz when LO set. TXI: Inverts TxD when set. RST: Software reset. 23 Product specification 83C576/87C576 D8 SCON RB8 TI RI (98H) SU00045 –– RST TXI LO AO ...

Page 24

... Flag ADF is set upon completion of a conversion, if the ADC interrupt enable bit EAD is set, the program will vector to the ADC interrupt location when ADF is set. 24 Product specification 83C576/87C576 CMPE EC2OD * EC1OD * EC0OD * (92H) P2.0 / CMP0 P2.1 / CMP1 P2.2 / CMP2 P2.3 / CMP3 CMP ...

Page 25

... In order for the PWMn output to be used as a standard I/O pin, PWMn must be reset. The PWM counter can still be used as an internal timer by setting EN/CLR#. 1998 Jun 04 83C576/87C576 Pulse Width Modulator Control Register Bit Definitions (PWCON = BCH) PWMF PWCON.3 Counter overflow flag, ...

Page 26

... WR pin while CS=0. The WR strobe latches port 0 data in the input buffer and sets the IBF flag on the trailing (rising) edge. When the 8XC576 reads from port 0 in UPI mode, it reads from the input buffer and 26 Product specification 83C576/87C576 OUTPUT P2.6 BUFFER OUTPUT P2.7 ...

Page 27

... Table 2 shows the state of I/O ports during low current operating modes. ALE PSEN PORT 0 PORT Data Data 1 1 Float Data 0 0 Data Data 0 0 Float Data 27 Product specification 83C576/87C576 must come up with RST low for a PORT 2 PORT 3 Data Data Address Data Data Data Data Data ...

Page 28

... OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer ROM CODE SUBMISSION When submitting ROM code for the 83C576, the following must be specified byte user ROM data 2. 32 byte ROM encryption key 3. ROM security bits 4 ...

Page 29

... Nonetheless suggested that conventional precautions be taken to avoid applying greater than the rated maxima. 3. Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V noted. 1998 Jun 04 83C576/87C576 RATING –55 to +125 –65 to +150 0 to +13.0 – ...

Page 30

... < V < See note 1MHz ALE and PSEN to momentarily fall below the 0. must be externally limited as follows Product specification 83C576/87C576 LIMITS 1 MIN TYP MAX UNIT –0.5 0.2V –0 –0.5 0.2V –0. –0 ...

Page 31

... Jun 10 TEST CONDITIONS Monotonic with no missing codes 7 7 0–100kHz 6.0V CC – 0.2V < AV < 0.2V 5.0V. (V ms) 31 Product specification 83C576/87C576 LIMITS MIN MAX UNIT 10 Bits 2 LSB 1 LSB 3 LSB 2 LSB 48t – ...

Page 32

... Center of a step of the actual transfer curve. 1998 Jun 04 (2) (1) (5) (4) (3) 1 LSB (ideal 1018 1019 1020 1 LSB = Figure 24. ADC Conversion Characteristic 32 Product specification 83C576/87C576 Offset Gain error error Full Scale error FS e 1021 1022 1023 1024 AV (LSB ...

Page 33

... Parameters are valid over operating temperature range unless otherwise specified. 2. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF. 3. Interfacing the 83C576/87C576 to devices with float times up to 45ns is permitted. This limited bus contention will not cause damage to Port 0 drivers. ...

Page 34

... Time for address valid to ALE low. AVLL t =Time for ALE low to PSEN low. LLPL t LLPL t PLPH t LLIV t PLIV t LLAX t PXIZ t PLAZ t PXIX INSTR IN t AVIV A0–A15 34 Product specification 83C576/87C576 MIN MAX UNIT A0–A7 A8– ...

Page 35

... Figure 26. External Data Memory Read Cycle t WHLH t WLWH t t WHQX QVWX DATA OUT P2.0–P2.7 OR A8–A15 FROM DPF Figure 27. External Data Memory Write Cycle 35 Product specification 83C576/87C576 A0–A7 FROM PCL INSTR IN A0–A15 FROM PCH SU00025 A0–A7 FROM PCL INSTR IN A0–A15 FROM PCH SU00069 ...

Page 36

... V max for a logic ‘0’ Figure 30. AC Testing Input/Output +0.1V TIMING REFERENCE POINTS –0.1V /V level occurs Figure 31. Float Waveform 36 Product specification 83C576/87C576 SET TI VALID VALID VALID VALID SET RI SU00027 SU00009 SU00010 V – ...

Page 37

... Figure 33. I vs. FREQ RST EA (NC) XTAL2 AV CC XTAL1 V SS SU00661 Figure 34. I Test Condition, Active Mode CC All other pins are disconnected 37 Product specification 83C576/87C576 SU00518 MAX ACTIVE TYP ACTIVE MAX IDLE TYP IDLE SU00245 ...

Page 38

... CHCL CLCX CLCH t CLCL Tests in Active and Idle Modes 5ns CLCH CHCL RST (NC) XTAL2 XTAL1 V SS SU00663A Test Condition, Power Down Mode CC All other pins are disconnected 5. Product specification 83C576/87C576 SU00009 ...

Page 39

... Philips (B6H) = B6H indicates 87C576 Program/Verify Algorithms Any algorithm in agreement with the conditions listed in Table 3, and which satisfies the timing specifications, is suitable. 39 Product specification 83C576/87C576 pin must not be allowed to go above the PP level for any amount of time. Even a narrow PP ...

Page 40

... PSEN ALE/PROG EA/V P2 held at 12.75V. Each programming pulse is low for and high for Product specification 83C576/87C576 P2.6 P1.1 P1 ...

Page 41

... Figure 39. PROG Waveform +5V + RST EA/V PP P1.0 ALE/PROG P1.1 87C576 PSEN XTAL2 P2.7 P2.6 XTAL1 P2.0–P2 Figure 40. Program Verification 41 Product specification 83C576/87C576 PGM DATA +12.75V PULSES TO GROUND A8–A12 SU00257B 50 s+10 SU00664 PGM DATA ENABLE 0 A8–A12 SU00258B ...

Page 42

... FOR VERIFICATION CONDITIONS SEE FIGURE 40. Figure 41. EPROM Programming and Verification 1998 Jun 04 PARAMETER * ADDRESS DATA IN t GHDX t GHAX t GHGL t GHSL LOGIC 1 LOGIC 0 t ELQV 42 Product specification 83C576/87C576 MIN MAX UNIT 12.5 13 MHz 48t CLCL 48t CLCL 48t CLCL 48t CLCL 48t ...

Page 43

... Philips Semiconductors 80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer DIP40: plastic dual in-line package; 40 leads (600 mil) 1998 Jun 04 83C576/87C576 43 Product specification SOT129-1 ...

Page 44

... Philips Semiconductors 80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer PLCC44: plastic leaded chip carrier; 44 leads 1998 Jun 04 83C576/87C576 44 Product specification SOT187-2 ...

Page 45

... Philips Semiconductors 80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer QFP44: plastic quad flat package; 44 leads (lead length 1.3 mm); body 1.75 mm 1998 Jun 04 83C576/87C576 45 Product specification SOT307-2 ...

Page 46

... Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1998 Jun 04 [1] Copyright Philips Electronics North America Corporation 1998 Document order number: 46 Product specification 83C576/87C576 All rights reserved. Printed in U.S.A. Date of release: 06-98 9397 750 04024 ...

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