ST486DX ST Microelectronics, ST486DX Datasheet - Page 7

• Manufacturer Part Number: ST486DX
• Description: PROGRAMMING MANUAL
• Manufacturer: ST Microelectronics

Table 2 - 1
The portions of the Configuration Control Registers (CCR1, CCR2, and CCR3) which apply to
SMM and power management are described in the following pages.
SMI
SMI = 0:
SMI = 1:
SMAC
SMAC = 0:
SMAC = 1:
MMAC
MMAC = 0:
MMAC = 1:
7
Enable SMM Pins
System Management Memory Access
Main Memory Access
Reserved
CCR1 Register
6
SMI# input pin is ignored and SMADS# output pin floats. Execution of
SGS Thomson specific SMM instructions will generate an invalid opcode exception.
SMI# input/output pin and SMADS# output pin are enabled. SMI must be set
to 1 before any attempted access to SMM memory is made.
All memory accesses in normal mode go to system memory with ADS# output
active. In normal mode, execution of SGS Thomson specific SMM instructions
generate an invalid opcode exception.
Memory accesses while in normal mode that fall within the specified SMM
address region generate an SMADS# output and access SMM memory. SMI#
input is ignored.
All Memory accesses while in SMM mode go to SMM memory with SMADS#
output active.
Data accesses while in SMM mode that fall within the specified SMM address
region will generate an ADS# output and access main memory. Code fetches
are not effected by the MMAC bit. Code fetches from the SMM address region
always generate an SMADS# output and access SMM memory. If both the
SMAC and MMAC bits are set to 1, the MMAC bit has precedence.
5
NO-LOCK
Register INDEX = C1h
4
MMAC
3
ST486DX - SMM IMPLEMENTATION
SMAC
2
SMI
1
RPL
0
15