ST486DX ST Microelectronics, ST486DX Datasheet - Page 11
ST486DX
Manufacturer Part Number
ST486DX
Description
PROGRAMMING MANUAL
Manufacturer
ST Microelectronics
Datasheet
1.ST486DX.pdf
(34 pages)
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RSLDT loads the information at the mem80 into Local Descriptor Table Register and its associated
descriptor.
SMINT will cause the CPU to enter SMM as though the hardware SMI# pin was sampled low.
The S bit in the SMM header is set. The SMI# signal is not driven by the CPU when SMM is en-
tered with SMINT.
2.3.2
2.3.3
RSM will restore the state of the CPU from the SMM header at the top of SMM space and exit
SMM. This is the last instruction executed in an SMI handler. After the CPU state is restored, the
SMI# pin is driven inactive for one clock then floated so the pin can be driven by the system.
2.3.4
RSTS loads the information at the mem80 address into the Task Register and its associated
descriptor.
2.3.5
Instruction
Instruction
Instruction
Instruction
RSLDT
SMINT
RSTS
RSM
RSLDT - Restore LDT and Descriptor
RSM - Resume Back to Normal Mode
RSTS - Restore TSR and Descriptor
SMINT - Software SMM Interrupt
0F 7B[mod 000 r/m]
0F 7D [mod 000 r/m]
Opcode
0F AA
Opcode
Opcode
Opcode
0F 7E
Parameters
Parameters
Parameters
Parameters
mem80
mem80
None
None
ST486DX - SMM IMPLEMENTATION
Core Clocks
Core Clocks
Core Clocks
Core Clocks
10
76
10
24
19
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