HT49R50 Holtek Semiconductor Inc, HT49R50 Datasheet - Page 49

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HT49R50

Manufacturer Part Number
HT49R50
Description
8-Bit Microcontroller
Manufacturer
Holtek Semiconductor Inc
Datasheet

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SWAP [m]
Description
Operation
Affected flag(s)
SWAPA [m]
Description
Operation
Affected flag(s)
SZ [m]
Description
Operation
Affected flag(s)
SZA [m]
Description
Operation
Affected flag(s)
Swap nibbles within the data memory
The low-order and high-order nibbles of the specified data memory (one of
the data memories) are interchanged.
[m].3~[m].0 « [m].7~[m].4
Swap data memory-place result in the accumulator
The low-order and high-order nibbles of the specified data memory are inter-
changed, writing the result to the accumulator. The contents of the data
memory remain unchanged.
ACC.3~ACC.0 ¬ [m].7~[m].4
ACC.7~ACC.4 ¬ [m].3~[m].0
Skip if data memory is zero
If the contents of the specified data memory are zero, the following instruc-
tion, fetched during the current instruction execution, is discarded and a
dummy cycle is replaced to get the proper instruction (two cycles). Otherwise
proceed with the next instruction (one cycle).
Skip if [m]=0
Move data memory to ACC, skip if zero
The contents of the specified data memory are copied to the accumulator. If
the contents is zero, the following instruction, fetched during the current in-
struction execution, is discarded and a dummy cycle is replaced to get the
proper instruction (two cycles). Otherwise proceed with the next instruction
(one cycle).
Skip if [m]=0, ACC ¬ [m]
TC2
TC2
TC2
TC2
¾
¾
¾
¾
TC1
TC1
TC1
TC1
¾
¾
¾
¾
TO
TO
TO
TO
¾
¾
¾
¾
PD
PD
PD
PD
¾
¾
¾
¾
49
OV
OV
OV
OV
¾
¾
¾
¾
¾
¾
¾
¾
Z
Z
Z
Z
AC
AC
AC
AC
¾
¾
¾
¾
¾
¾
¾
¾
C
C
C
C
August 18, 1999
HT49C50

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