HT48R02N Holtek Semiconductor, HT48R02N Datasheet - Page 46

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HT48R02N

Manufacturer Part Number
HT48R02N
Description
(HT4xR0xx) Small Package 8-Bit OTP MCU
Manufacturer
Holtek Semiconductor
Datasheet
www.DataSheet4U.com
A/D Input Pins
All of the A/D analog input pins are pin-shared with the
I/O pins on Port A. Bits PCR3~PCR0 in the register, de-
termine whether the input pins are setup as normal Port
A input/output pins or whether they are setup as analog
inputs. In this way, pins can be changed under program
control to change their function from normal I/O opera-
tion to analog inputs and vice versa. Pull-high resistors,
which are setup through register programming, apply to
the input pins only when they are used as normal I/O
pins, if setup as A/D inputs the pull-high resistors will be
automatically disconnected. Note that it is not neces-
sary to first setup the A/D pin as an input in the PBC port
control register to enable the A/D input as when the
PCR3~PCR0 bits enable an A/D input, the status of the
port control register will be overridden.
Summary of A/D Conversion Steps
The following summarises the individual steps that
should be executed in order to implement an A/D con-
version process.
Rev.1.00
12MHz
Step 1
Select the required A/D conversion clock by correctly
programming bits ADCS2, ADCS1 and ADCS0 in the
register.
Step 2
Enable the A/D by clearing the in the ACSR register to
zero.
Step 3
Select which channel is to be connected to the internal
A/D converter by correctly programming the
ACS1~ACS0 bits which are also contained in the reg-
ister.
Step 4
Select which pins are to be used as A/D inputs and
configure them as A/D input pins by correctly pro-
gramming the PCR3~PCR0 bits in the ADCR register.
Note that this step can be combined with Step 2 into a
single ADCR register programming operation.
Step 5
1MHz
2MHz
4MHz
8MHz
f
SYS
ADCS0=000
ADCS2,
ADCS1,
(f
250ns*
167ns*
500ns
SYS
2 s
1 s
/2)
ADCS0=001
ADCS2,
ADCS1,
(f
667ns
SYS
8 s
4 s
2 s
1 s
/8)
ADCS0=010
A/D Clock Period Examples
(f
ADCS2,
ADCS1,
2.67 s
SYS
32 s
16 s
8 s
4 s
/32)
A/D Clock Period (t
ADCS0=100
46
ADCS2,
ADCS1,
250ns*
125ns*
500ns
83ns*
(f
Note:
The accompanying diagram shows graphically the vari-
ous stages involved in an analog to digital conversion
process and its associated timing.
The setting up and operation of the A/D converter func-
tion is fully under the control of the application program as
there are no configuration options associated with the
A/D converter. After an A/D conversion process has been
initiated by the application program, the microcontroller
internal hardware will begin to carry out the conversion,
during which time the program can continue with other
functions. The time taken for the A/D conversion is 16t
where t
1 s
SYS)
If the interrupts are to be used, the interrupt control reg-
isters must be correctly configured to ensure the A/D
converter interrupt function is active. The master inter-
rupt control bit, EMI, in the INTC0 interrupt control reg-
ister must be set to 1 , the multi-function interrupt
enable bit, EMFI, in the INTC1 register and the A/D
converter interrupt bit, ADE, in the INTC1 register must
also be set to 1 .
Step 6
The analog to digital conversion process can now be
initialised by setting the START bit in the ADCR regis-
ter from 0 to 1 and then to 0 again. Note that this
bit should have been originally set to 0 .
Step 7
To check when the analog to digital conversion pro-
cess is complete, the EOCB bit in the ADCR register
can be polled. The conversion process is complete
when this bit goes low. When this occurs the A/D data
registers ADRL and ADRH can be read to obtain the
conversion value. As an alternative method if the in-
terrupts are enabled and the stack is not full, the pro-
gram can wait for an A/D interrupt to occur.
AD
When checking for the end of the conversion
process, if the method of polling the EOCB bit in
the ADCR register is used, the interrupt enable
step above can be omitted.
is equal to the A/D clock period.
AD
ADCS0=101
ADCS2,
ADCS1,
)
(f
333ns*
500ns
SYS
4 s
2 s
1 s
/4)
HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
ADCS0=110
(f
ADCS2,
ADCS1,
SYS
16 s
8 s
4 s
2 s
1 s
/16)
December 15, 2009
ADCS0=011,
Undefined
Undefined
Undefined
Undefined
Undefined
ADCS2,
ADCS1,
111
AD

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