HT48R02N Holtek Semiconductor, HT48R02N Datasheet - Page 19

• Manufacturer Part Number: HT48R02N
• Description: (HT4xR0xx) Small Package 8-Bit OTP MCU
• Manufacturer: Holtek Semiconductor

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Rev.1.00
CTRL0 Register - HT48R01B/HT48R02B/HT48R01N/HT48R02N
CTRL1 Register
Bit 7
Bit 6
Bit 5~3
Bit 2
Bit 1
Bit 0
Bit 7, 6
Bit 5, 4
Bit 3~0
Note:
Name
Name
POR
POR
R/W
R/W
Bit
Bit
INTEG1
unimplemented, read as 0
PFDCS: PFD clock source
0: timer0
1: timer1
unimplemented, read as 0
PFDC: I/O or PFD
0: I/O
1: PFD
LXTLP: LXT oscillator low power control function
0: LXT Oscillator quick start-up mode
1: LXT Oscillator Low Power Mode
CLKMOD: system clock mode selection.
0: High speed - HIRC used as system clock
1: Low speed - LXT used as system clock, HIRC oscillator stopped.
These selections are only valid if the oscillator configuration options
have selected the HIRC+LXT.
INTEG1, INTEG0: External interrupt edge type
00: disable
01: rising edge trigger
10: falling edge trigger
11: dual edge trigger
TBSEL1, TBSEL0: Time base period selection
00: 2
01: 2
10: 2
11: 2
WDTEN3, WDTEN2, WDTEN1, WDTEN0: WDT function enable
1010: WDT disabled
Other values: WDT enabled - Recommended value is 0101
If the watchdog timer enable configuration option is selected, then the watchdog timer will
always be enabled and the WDTEN3~WDTEN0 control bits will have no effect.
The WDT is only disabled when both the WDT configuration option is disabled and when bits
WDTEN3~WDTEN0=1010.
The WDT is enabled when either the WDT configuration option is enabled or when bits
WDTEN3~WDTEN0 1010.
R/W
7
7
1
13
10
11
12
(1/f
(1/f
(1/f
(1/f
INTEG0
PFDCS
TP
TP
TP
TP
R/W
R/W
)
)
)
)
6
0
6
0
TBSEL1
R/W
5
5
0
TBSEL0
19
R/W
4
4
0
WDTEN3
R/W
3
3
1
WDTEN2
HT46R01B/02B/01N/02N
HT48R01B/02B/01N/02N
PFDC
R/W
R/W
2
0
2
0
WDTEN1
LXTLP
R/W
R/W
1
0
1
1
December 15, 2009
CLKMOD
WDTEN0
R/W
R/W
0
0
0
0