CY7C4285V-10ASC Cypress Semiconductor Corp, CY7C4285V-10ASC Datasheet - Page 8

• Manufacturer Part Number: CY7C4285V-10ASC
• Description: IC DEEP SYN FIFO 64KX18 64LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C4285V-10ASC

• Function: Synchronous
• Memory Size: 1.1K (64 x 18)
• Data Rate: 100MHz
• Access Time: 8ns
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1242

Switching Waveforms
Document #: 38-06012 Rev. *A
First Data Word Latency after Reset with Simultaneous Read and Write
Reset Timing
Notes:
16. The clocks (RCLK, WCLK) can be free-running during reset.
17. After reset, the outputs will be LOW if OE = 0 and three-state if OE = 1.
18. When t
19. The first word is always available the cycle after EF goes HIGH.
REN, WEN,
Q
D
0
0
Q
WCLK
RCLK
EF,PAE
FF,PAF,
WEN
–D
–Q
0 –
REN
or t
OE
EF
17
17
CLK
RS
Q
HF
LD
17
SKEW2
+ t
SKEW2
t
ENS
[16]
> minimum specification, t
. The Latency Timing applies only at the Empty Boundary (EF = LOW).
t
DS
D
0
(FIRSTVALID WRITE)
(continued)
t
FRL
SKEW2
(maximum) = t
t
t
t
RSF
RSF
RSF
t
RS
t
OLZ
t
FRL
[18]
CLK
+ t
t
D
REF
SKEW2
1
. When t
t
OE
SKEW2
< minimum specification, t
t
RSR
t
D
A
2
CY7C4255V/CY7C4265V
CY7C4275V/CY7C4285V
FRL
(maximum) = either 2*t
D
0
t
A
[19]
D
3
OE=0
OE=1
[17]
Page 8 of 20
CLK
4275V–10
+ t
D
4275V–11
1
SKEW2
D
4