MC33910 Freescale Semiconductor, MC33910 Datasheet - Page 30

• Manufacturer Part Number: MC33910
• Description: LIN System Basis Chip
• Manufacturer: Freescale Semiconductor

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short to V
LINOC in the LIN status register (LINSR) is set.
Interrupt IRQ will be generated.
Over-Temperature Shutdown (LIN Interrupt)
temperature conditions. In case of an over-temperature
condition, the transmitter will be shut down and the bit LINOT
in the LIN status register (LINSR) is set.
Interrupt IRQ will be generated.
condition is gone and TXD is high.
will re-enable the transmitter.
RXD Short Circuit Detection (LIN Interrupt)
RXD output pin. In case of an short-circuit condition, either 5V
or ground, the bit RXSHORT in the LIN status register
(LINSR) is set and the transmitter is shutdown.
interrupt IRQ will be generated.
condition is gone (transition on RXD) and TXD is high.
pin short circuit condition will clear the bit RXSHORT.
TXD Dominant Detection (LIN Interrupt)
stuck in dominant (0V) condition. In case of a stuck condition
(TXD pin 0V for more than 1 second (typ.)) the transmitter is
shut down and the bit TXDOM in the LIN status register
(LINSR) is set.
interrupt IRQ will be generated.
30
33910
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
If the bit LINM is set in the interrupt mask register (IMR) an
The output low side FET is protected against over-
If the bit LINM is set in the interrupt mask register (IMR) an
The transmitter is automatically re-enabled once the
A read of the LIN status register (LINSR) with the TXD pin
The LIN transceiver has a short-circuit detection for the
If the bit LINM is set in the interrupt mask register (IMR) an
The transmitter is automatically re-enabled once the
A read of the LIN status register (LINSR) without the RXD
The LIN transceiver monitors the TXD input pin to detect
If the bit LINM is set in the interrupt mask register (IMR) an
BAT
), the transmitter will not be shut down. The bit
the LIN pin in recessive state. The receiver is still active to be
able to detect wake-up events on the LIN bus line.
high.
is high will clear the bit TXDOM.
LIN Dominant Voltage Level Selection
LDVS in the LIN control register (LINCR).
LIN Receiver Operation Only
disables the LIN TX driver. In the case of a LIN error condition
this bit is automatically set. In case a Low Power Mode is
selected with this bit set, the LIN wake-up functionality is
disabled, then, in Stop Mode, the RXD pin will reflect the state
of the LIN bus.
STOP Mode And Wake-up Feature
layer is disabled. In case the bit LIN-PU was set in the Stop
Mode sequence the internal pull-up resistor is disconnected
from VSUP and a small current source keeps the LIN pin in
the recessive state. The receiver is still active and able to
detect wake-up events on the LIN bus line.
edge will generate a wake-up interrupt and will be reported in
the ISR. Also see
SLEEP Mode And Wake-up Feature
physical layer is disabled. In case the bit LIN-PU was set in
the Sleep Mode sequence the internal pull-up resistor is
disconnected from V
edge will generate a system wake-up (Reset) and will be
reported in the ISR. Also see
The transmitter is automatically re-enabled once TXD is
A read of the LIN status register (LINSR) with the TXD pin
The LIN dominant voltage level can be selected by the bit
While in Normal Mode the activation of the RXONLY bit
During Stop Mode operation the transmitter of the physical
A dominant level longer than t
During Sleep Mode operation the transmitter of the
A dominant level longer than t
Figure
SUP
Analog Integrated Circuit Device Data
and a small current source keeps
11, page 19.
Figure
PROPWL
PROPWL
Freescale Semiconductor
10, page 18.
followed by a rising
followed by a rising