MC33910 Freescale Semiconductor, MC33910 Datasheet - Page 27

• Manufacturer Part Number: MC33910
• Description: LIN System Basis Chip
• Manufacturer: Freescale Semiconductor

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WINDOW WATCHDOG
which is active in Normal Mode. The watchdog can be
configured by an external resistor connected to the WDCONF
pin. The resistor is used to achieve higher precision in the
timebase used for the watchdog.
MOD bits of the MCR.
not allowed; but after the first half of the PSPI-timeout window
the clear operation opens. If a clear operation is performed
outside the window, the 33910 will reset the MCU, in the
same way as when the watchdog overflows.
must connect the WDCONF pin to ground. This measure
Analog Integrated Circuit Device Data
Freescale Semiconductor
• Cyclic sense wake-up inputs
• Force wake-up
• LIN wake-up
The 33910 includes a configurable window watchdog
SPI clears are performed by writing through the SPI in the
During the first half of the SPI timeout watchdog clears are
To disable the watchdog function in Normal Mode the user
WD TIMING X 50%
NO WATCHDOG CLEAR
Figure 16. Window Watchdog Operation
WINDOW CLOSED
WD TIMING SELECTED BY REGISTER
ALLOWED
ON WDCONF PIN
WD PERIOD (t
PWD
WD TIMING X 50%
FOR WATCHDOG
WINDOW OPEN
)
CLEAR
effectively disables Normal Request Mode. The WDOFF bit
in the WDSR will be set. This condition is only detected
during Reset Mode.
the watchdog falls back to the internal lower precision
timebase of 150ms (typ.) and signals the faulty condition
through the WDSR.
prescaler which can be configured by the TIMCR. During
Normal Request Mode, the window watchdog is not active
but there is a 150ms (typ.) timeout for leaving the Normal
Request Mode. In case of a timeout, the 33910 will enter into
Reset Mode, resetting the microcontroller before entering
again into Normal Request Mode.
HIGH SIDE OUTPUT PINS HS1 AND HS2
small resistive loads or LEDs incorporating the following
features:
the High Side Control Register (HSCR).
PWM Capability (direct access)
direct control via the PWMIN pin.
Control Register (HSCR), then the HS1 driver is turned on if
the PWMIN pin is high and turned of if the PWMIN pin is low.
This applies to HS2 configuring HS2 and PWMHS2 bits.
If neither a resistor nor a connection to ground is detected,
The watchdog timebase can be further divided by a
These outputs are two high side drivers intended to drive
• PWM capability (software maskable)
• Open load detection
• Current limitation
• Over-temperature shutdown (with maskable interrupt)
• High-voltage shutdown (software maskable)
• Cyclic sense
The high side switches are controlled by the bits HS1:2 in
Each high side driver offers additional (to the SPI control)
If both the bits HS1 and PWMHS1 are set in the High Side
FUNCTIONAL DEVICE OPERATIONS
OPERATIONAL MODES
33910
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