SiP41105 Vishay Siliconix, SiP41105 Datasheet - Page 6

• Manufacturer Part Number: SiP41105
• Description: Half-Bridge N-Channel MOSFET Driver
• Manufacturer: Vishay Siliconix

Delay
The addition of a capacitor between DELAY and GND will
increase the propagation delay time for OUT
Delay capacitance may be added to prevent shoot through
current in the low-side MOSFET due to the finite time between
OUT
MOSFET. Choose a MOSFET with lower gate resistance to
reduce this effect. If necessary, choose a capacitor value that
prevents MOSFET conduction under worst-case temperature
and manufacturing conditions. Propagation delay is increased
according to the ratio of 1.2 ns/pF.
Synchronous MOSFET Enable
Under light load conditions, efficiency can be increased by
disabling the synchronous MOSFET, thus avoiding the gate
charge losses of the synchronous MOSFET. When EN
is low, OUT
operates normally. EN
Shutdown
The driver enters shutdown mode when SD is low. Shutdown
current is less than 1 mA.
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6
SiP41105
Vishay Siliconix
TYPICAL CHARACTERISTICS
L
going low and the continuing conduction of the low-side
50
40
30
20
10
0
0
L
is forced low. When high, the low-side driver
1
I
1 MHz
DD
SYNC
vs. C
2
should be driven by a 5-V signal.
LOAD
C
LOAD
vs. Frequency
(nF)
500 kHz
3
200 kHz
4
H
going high.
5
New Product
SYNC
V
MOSFET drivers draw large peak currents from the supplies
when they switch. A local bypass capacitor is required to
supply this current and reduce power supply noise. Connect
a 1-mF ceramic capacitor as close as practical between the
V
Undervoltage Lockout
Undervoltage lockout prevents control of the circuit until the
supply voltages reach valid operating levels. The UVLO circuit
forces OUT
voltage. A separate UVLO forces OUT
between BOOT and LX is below the specified voltage.
Thermal Protection
If the die temperature rises above 165_C, the thermal
protection disables the drivers. The drivers are re-enabled
after the die temperature has decreased below 140_C.
DD
DD
Bypass Capacitor
and GND pins.
140.0
120.0
100.0
80.0
60.0
40.0
20.0
L
0.0
and OUT
0
10
Highside Turn On Delay vs. C
H
20
to low when V
30
40
C
50
DELAY
DD
S-50265—Rev. C, 21-Feb-05
60
H
(pF)
Document Number: 72719
low when the voltage
is below its specified
70
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80
DELAY
90 100 110