IDT70T3589 Integrated Device Technology, IDT70T3589 Datasheet - Page 6

• Manufacturer Part Number: IDT70T3589
• Description: 64k X 36 Sync, 3.3v/2.5v Dual-port Ram, Interleaved I/o S
• Manufacturer: Integrated Device Technology

Pin Names
CE
R/W
OE
A
I/O
CLK
PL/FT
ADS
CNTEN
REPEAT
BE
IDT70T3519/99/89S
High-Speed 2.5V 256/128/64K x 36 Dual-Port Synchronous Static RAM
0L
0L
0L
0L
L
L
- A
L
,
L
Left Port
- I/O
- BE
CE
L
COL
V
17L
INT
OPT
L
ZZ
DDQL
1L
L
(6)
35L
3L
L
L
L
L
TRST
TMS
TDO
TCK
TDI
V
V
DD
SS
R/W
I/O
CLK
PL/FT
CE
OE
A
ADS
CNTEN
REPEAT
BE
(5)
(5)
(5)
(5)
(5)
0R
0R
0R
0R
R
R
R
- A
Right Port
R
,
- I/O
R
- BE
CE
COL
V
INT
OPT
17R
R
DDQR
ZZ
R
1R
35R
(6)
3R
R
R
R
R
Chip Enables (Input)
Read/Write Enable (Input)
Output Enable (Input)
Data Input/Output
Clock (Input)
Pipeline/Flow-Through (Input)
Counter Enable (Input)
Counter Repeat
Byte Enables (9-bit bytes) (Input)
Power (I/O Bus) (3.3V or 2.5V)
Option for selecting V
Sleep Mode pin
Power (2.5V)
Ground (0V) (Input)
Reset (Initialize TAP Controller) (Input)
Interrupt Flag (Output)
Collision Alert (Output)
Address (Input)
Address Strobe Enable (Input)
Test Data Input
Test Data Output
Test Logic Clock (10MHz) (Input)
Test Mode Select (Input)
(1)
(Input)
(3)
Names
(4)
(Input)
(7)
DDQX
(1,2)
(Input)
(1)
5666 tbl 01
(7)
(Input)
6.42
6
NOTES:
1. V
2. OPT
3. When REPEAT
4. The sleep mode pin shuts off all dynamic inputs, except JTAG inputs, when
5. Due to limited pin count, JTAG is not supported in the DR-208 package.
6. Address A
7. Chip Enables and Byte Enables are double buffered when PL/FT = V
applying inputs on the I/Os and controls for that port.
If OPT
levels and V
port's I/Os and address controls will operate at 2.5V levels and V
supplied at 2.5V. The OPT pins are independent of one another—both ports can
operate at 3.3V levels, both can operate at 2.5V levels, or either can operate
at 3.3V with the other at 2.5V.
via ADS
asserted. All static inputs, i.e., PL/FTx and OPTx and the sleep mode pins
themselves (ZZx) are not affected during sleep mode. It is recommended that
boundry scan not be operated during sleep mode.
NC's for the IDT 70T3589.
signals take two cycles to deselect.
DD
, OPT
X
selects the operating voltage levels for the I/Os and controls on that port.
X
is set to V
X
.
X
17x
, and V
DDQX
is a NC for the IDT70T3599. Also, Addresses A
X
is asserted, the counter will reset to the last valid address loaded
Industrial and Commercial Temperature Ranges
DD
must be supplied at 3.3V. If OPT
DDQX
(2.5V), then that port's I/Os and controls will operate at 3.3V
must be set to appropriate operating levels prior to
X
is set to V
APRIL 10, 2006
SS
17x
(0V), then that
DDQX
and A
IH
, i.e., the
must be
16x
are