ACS8520T Semtech, ACS8520T Datasheet - Page 115
ACS8520T
Manufacturer Part Number
ACS8520T
Description
Synchronous Equipment Timing Source (SETS) for Stratum 3/4E/4 and SMC Systems
Manufacturer
Semtech
Datasheet
1.ACS8520T.pdf
(150 pages)
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Address (hex):
Address (hex):
Revision 3.02/October 2005 © Semtech Corp.
ADVANCED COMMUNICATIONS
Register Name
Register Name
Bit No.
Bit No.
Bit 7
[7:2]
[1:0]
Bit 7
[7:4]
[3:0]
66
67
cnfg_T4_DPLL_bw
Description
Not used.
T4_DPLL_bandwidth
Register to configure the bandwidth of the T4 DPLL.
cnfg_T0_DPLL_locked_bw
Description
Not used.
T0_DPLL_locked_bandwidth
Register to configure the bandwidth of the T0 DPLL
when locked to an input reference. Reg. 3B Bit 7 is
used to control whether this bandwidth is used all of
the time or automatically switched to when phase
locked.
Bit 6
Bit 6
Bit 5
Bit 5
Description
Description
Bit 4
Bit 4
FINAL
Page 115
(R/W) Register to configure the
bandwidth of the T4 DPLL.
(R/W) Register to configure the
bandwidth of the T0 DPLL, when
phase locked to an input.
All other values
Bit Value
Bit Value
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
Bit 3
Bit 3
00
01
10
11
-
-
Value Description
-
T4 DPLL 18 Hz bandwidth.
T4 DPLL 35 Hz bandwidth.
T4 DPLL 70 Hz bandwidth.
Not used.
Value Description
-
T0 DPLL 0.1 Hz locked bandwidth.
T0 DPLL 0.3 Hz locked bandwidth.
T0 DPLL 0.6 Hz locked bandwidth.
T0 DPLL 1.2 Hz locked bandwidth.
T0 DPLL 2.5 Hz locked bandwidth.
T0 DPLL 4 Hz locked bandwidth.
T0 DPLL 8 Hz locked bandwidth.
T0 DPLL 18 Hz locked bandwidth.
T0 DPLL 35 Hz locked bandwidth.
T0 DPLL 70 Hz locked bandwidth.
Not used.
T0_DPLL_locked_bandwidth
Bit 2
Bit 2
Default Value
Default Value
ACS8520 SETS
Bit 1
Bit 1
T4_DPLL_bandwidth
DATASHEET
www.semtech.com
0000 0000
0000 1011
Bit 0
Bit 0
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